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authorGravatar Wenbin Mei <wenbin.mei@mediatek.com> 2022-07-28 16:00:48 +0800
committerGravatar Ulf Hansson <ulf.hansson@linaro.org> 2022-08-15 16:24:48 +0200
commitcc5d1692600613e72f32af60e27330fe0c79f4fe (patch)
tree962105500ccd1190ac9d57e696f051bbdb30a37c /CREDITS
parentmmc: pxamci: Fix another error handling path in pxamci_probe() (diff)
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mmc: mtk-sd: Clear interrupts when cqe off/disable
Currently we don't clear MSDC interrupts when cqe off/disable, which led to the data complete interrupt will be reserved for the next command. If the next command with data transfer after cqe off/disable, we process the CMD ready interrupt and trigger DMA start for data, but the data complete interrupt is already exists, then SW assume that the data transfer is complete, SW will trigger DMA stop, but the data may not be transmitted yet or is transmitting, so we may encounter the following error: mtk-msdc 11230000.mmc: CMD bus busy detected. Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com> Fixes: 88bd652b3c74 ("mmc: mediatek: command queue support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20220728080048.21336-1-wenbin.mei@mediatek.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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