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| author |  Florian Fainelli <f.fainelli@gmail.com>
| 2017-02-27 16:14:22 -0600 |
|---|---|---|
| committer |  Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| 2017-03-17 15:10:48 +0900 |
| commit | 4348f7e2ae250d9b986b08c8e8ea8a402790f369 (patch) | |
| tree | 3f3a646a8210719a515ff68a045c78b67dff1d29 /drivers/fpga/altera-freeze-bridge.c | |
| parent | fpga: region: Add fpga-region property 'encrypted-fpga-config' (diff) | |
| download | linux-4348f7e2ae250d9b986b08c8e8ea8a402790f369.tar.gz linux-4348f7e2ae250d9b986b08c8e8ea8a402790f369.tar.bz2 linux-4348f7e2ae250d9b986b08c8e8ea8a402790f369.zip | |
FPGA: Add TS-7300 FPGA manager
Add support for loading bitstreams on the Altera Cyclone II FPGA
populated on the TS-7300 board. This is done through the configuration
and data registers offered through a memory interface between the EP93xx
SoC and the FPGA via an intermediate CPLD device.
The EP93xx SoC on the TS-7300 does not have direct means of configuring
the on-board FPGA other than by using the special memory mapped
interface to the CPLD. No other entity on the system can control the
FPGA bitstream.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Alan Tull <atull@opensource.altera.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/fpga/altera-freeze-bridge.c')
0 files changed, 0 insertions, 0 deletions