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2023-02-24Merge tag 'devicetree-for-6.3' of ↵Gravatar Linus Torvalds 4-1/+188
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add node lifecycle unit tests - Add of_property_present() helper aligned with fwnode API - Print more information on reserved regions on boot - Update dtc to upstream v1.6.1-66-gabbd523bae6e - Use strscpy() to instead of strncpy() in DT core - Add option for schema validation on %.dtb targets Bindings: - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES - Rework external memory controller/bus bindings to properly support controller specific child node properties - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT schema format - Add RiscV SBI PMU event mapping binding - Add missing contraints on Arm SCMI child node allowed properties - Add a bunch of missing Socionext UniPhier glue block bindings and example fixes - Various fixes for duplicate or conflicting type definitions on DT properties" * tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (66 commits) dt-bindings: regulator: Add mps,mpq7932 power-management IC of: dynamic: Fix spelling mistake "kojbect" -> "kobject" dt-bindings: drop Sagar Kadam from SiFive binding maintainership dt-bindings: sram: qcom,imem: document sm8450 dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema dt-bindings: arm: Add Cortex-A715 and X3 of: dynamic: add lifecycle docbook info to node creation functions of: add consistency check to of_node_release() of: do not use "%pOF" printk format on node with refcount of zero of: unittest: add node lifecycle tests of: update kconfig unittest help of: add processing of EXPECT_NOT to of_unittest_expect of: prepare to add processing of EXPECT_NOT to of_unittest_expect of: Use preferred of_property_read_* functions of: Use of_property_present() helper of: Add of_property_present() helper of: reserved_mem: Use proper binary prefix dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES of: reserved-mem: print out reserved-mem details during boot dt-bindings: serial: restrict possible child node names ...
2023-02-07dt-bindings: intel,ixp4xx-expansion-bus: split out peripheral propertiesGravatar Krzysztof Kozlowski 3-0/+187
The properties of devices in IXP4xx expansion bus need to be also applied to actual devices' bindings. Prepare for this by splitting them to separate intel,ixp4xx-expansion-peripheral-props binding, just like other memory-controller peripheral properties. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20230206092624.22922-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2023-01-09dt-bindings: edac: Add bindings for Xilinx ZynqMP OCMGravatar Shubhrajyoti Datta 1-0/+45
Add bindings for Xilinx ZynqMP OCM controller. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com> Co-developed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230104084512.1855243-2-sai.krishna.potthuri@amd.com
2022-12-26dt-bindings: memory-controllers: ti,gpmc: fix typo in descriptionGravatar Colin Foster 1-1/+1
Fix typo where 'GPMC driver implements an interrupt controller' instead of 'and interrupt controller' Signed-off-by: Colin Foster <colin.foster@in-advantage.com> Link: https://lore.kernel.org/r/20221222182309.575069-1-colin.foster@in-advantage.com Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-16dt-bindings: drop redundant part of title (end, part three)Gravatar Krzysztof Kozlowski 2-2/+2
The Devicetree bindings document does not have to say in the title that it is a "binding", but instead just describe the hardware. Drop trailing "bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> # ROHM Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Acked-by: Viresh Kumar <viresh.kumar@linaro.org> # cpufreq Link: https://lore.kernel.org/r/20221216163815.522628-7-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-16dt-bindings: drop redundant part of title (end)Gravatar Krzysztof Kozlowski 3-3/+3
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Drop trailing "Devicetree bindings" in various forms (also with trailing full stop): find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \; find Documentation/devicetree/bindings/ -type f -name '*.yaml' \ -not -name 'trivial-devices.yaml' \ -exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \; Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Acked-by: Stephen Boyd <sboyd@kernel.org> # clk Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media Acked-by: Sebastian Reichel <sre@kernel.org> # power Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-12-16dt-bindings: memory-controllers: ti,gpmc-child: drop redundant part of titleGravatar Krzysztof Kozlowski 1-1/+1
The Devicetree bindings document does not have to say in the title that it is a "Devicetree binding", but instead just describe the hardware. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC Link: https://lore.kernel.org/r/20221216163815.522628-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring <robh@kernel.org>
2022-11-02dt-bindings: memory-controllers: ti,gpmc: add wait-pin polarityGravatar Benedikt Niedermayr 1-0/+7
The GPMC controller has the ability to configure the polarity for the wait pin. The current properties do not allow this configuration. This binding directly configures the WAITPIN<X>POLARITY bit in the GPMC_CONFIG register by setting the "ti,wait-pin-polarity" dt-property. Signed-off-by: Benedikt Niedermayr <benedikt.niedermayr@siemens.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Roger Quadros <rogerq@kernel.org> Link: https://lore.kernel.org/r/20221102133047.1654449-3-benedikt.niedermayr@siemens.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-28dt-bindings: memory-controllers: arm,pl353-smc: Extend to support ↵Gravatar Rob Herring 1-27/+53
'arm,pl354' SMC Add support for the Arm PL354 static memory controller to the existing Arm PL353 binding. Both are different configurations of the same IP with support for different types of memory interfaces. The 'arm,pl354' binding has already been in use upstream for a long time in Arm development boards. The existing users have only the controller without any child devices, so drop the required address properties (ranges, #address-cells, #size-cells). The schema for 'ranges' is too constrained as the order is not important and the PL354 has 8 chipselects (And the PL353 actually has up to 8 too). The clocks aren't really correct in either case. There's 1 bus clock and then a clock for each of the 2 memory interfaces. Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20221021203928.286169-1-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory-controller: st,stm32: Split off MC propertiesGravatar Marek Vasut 3-137/+183
Split st,stm32-fmc2-ebi.yaml specific properties into st,stm32-fmc2-ebi-props.yaml, split memory-controller bus peripheral properties into mc-peripheral-props.yaml, reference the st,stm32-fmc2-ebi-props.yaml in mc-peripheral-props.yaml and reference the mc-peripheral-props.yaml in micrel,ks8851.yaml. This way, the FMC2 controller properties in Micrel KSZ8851MLL ethernet controller node can be properly validated. Fixes the following warning: arch/arm/boot/dts/stm32mp153c-dhcor-drc-compact.dtb: ethernet@1,0: Unevaluated properties are not allowed ('bank-width', 'st,fmc2-ebi-cs-mux-enable', ... 'st,fmc2-ebi-cs-write-data-hold-ns' were unexpected) Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20220928181944.194808-1-marex@denx.de [krzk: trim warning message] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: Add jedec,lpddrX-channel bindingGravatar Julius Werner 2-1/+155
This patch adds a new device tree binding for an LPDDR channel to serve as a top-level organizing node for LPDDR part nodes nested below it. An LPDDR channel needs to have an "io-width" property to describe its width (this is important because this width does not always match the io-width of the part number, indicating that multiple parts are wired in parallel on the same channel), as well as one or more nested "rank@X" nodes. Those represent information about the individual ranks of each LPDDR part connected on that channel and should match the existing "jedec,lpddrX" bindings for individual LPDDR parts. New platforms should be using this node -- the existing practice of providing a raw, toplevel "jedec,lpddrX" node without indication of how many identical parts are in the system should be considered deprecated. Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-4-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: Add jedec,lpddr4 and jedec,lpddr5 bindingsGravatar Julius Werner 3-0/+85
This patch adds bindings for LPDDR4 and LPDDR5 memory analogous to the existing bindings for LPDDR2 and LPDDR3. For now, the new types are only needed for topology description, so other properties like timing parameters are omitted. They can be added later if needed. Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-3-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: Add numeric LPDDR compatible string variantGravatar Julius Werner 3-7/+23
This patch allows a new kind of compatible string for LPDDR parts in the device tree bindings, in addition to the existing hardcoded <vendor>,<part-number> strings. The new format contains manufacturer and part (revision) information in numerical form, such as lpddr3-ff,0201 for an LPDDR3 part with manufacturer ID ff and revision ID 0201. This helps cases where LPDDR parts are probed at runtime by boot firmware and cannot be matched to hardcoded part numbers, such as the firmware on the qcom/sc7280-herobrine boards does (which supports 4 different memory configurations at the moment, and more are expected to be added later at a point where the boot firmware can no longer be updated to specifically accommodate them). Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-2-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: Factor out common properties of LPDDR bindingsGravatar Julius Werner 3-64/+60
The bindings for different LPDDR versions mostly use the same kinds of properties, so in order to reduce duplication when we're adding support for more versions, this patch creates a new lpddr-props subschema that can be referenced by the others to define these common parts. (This will consider a few smaller I/O width and density numbers "legal" for LPDDR3 that are usually not used there, but this should be harmless.) Signed-off-by: Julius Werner <jwerner@chromium.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930220606.303395-1-jwerner@chromium.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-18dt-bindings: memory: renesas,rpc-if: Document R-Car V4H supportGravatar Hai Pham 1-0/+5
Document support for the SPI Multi I/O Bus Controller (RPC-IF) in the R-Car V4H SoC. Signed-off-by: Hai Pham <hai.pham.ud@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/c268cb4497cbe79773bb6568f36c37adc6fb5bbe.1665582645.git.geert+renesas@glider.be Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-10-17dt-bindings: memory-controller: st,stm32: Fix ↵Gravatar Marek Vasut 1-1/+1
st,fmc2_ebi-cs-write-address-setup-ns The property st,fmc2_ebi-cs-write-address-setup-ns should really be st,fmc2-ebi-cs-write-address-setup-ns (there is underscore _ between fmc2 and ebi and there should be a dash - instead). This is a remnant from conversion of old non-upstream bindings. Fix it. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220926222003.527171-1-marex@denx.de
2022-10-10Merge tag 'devicetree-for-6.1' of ↵Gravatar Linus Torvalds 1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Fix node refcounting in of_find_last_cache_level() - Constify device_node in of_device_compatible_match() - Fix 'dma-ranges' handling in bus controller nodes - Fix handling of initrd start > end - Improve error reporting in of_irq_init() - Taint kernel on DT unittest running - Use strscpy instead of strlcpy - Add a build target, dt_compatible_check, to check for compatible strings used in kernel sources against compatible strings in DT schemas. - Handle DT_SCHEMA_FILES changes when rebuilding DT bindings: - LED bindings for MT6370 PMIC - Convert Mediatek mtk-gce mailbox, MIPS CPU interrupt controller, mt7621 I2C, virtio,pci-iommu, nxp,tda998x, QCom fastrpc, qcom,pdc, and arm,versatile-sysreg to DT schema format - Add nvmem cells to u-boot,env schema - Add more LED_COLOR_ID definitions - Require 'opp-table' uses to be a node - Various schema fixes to match QEMU 'virt' DT usage - Tree wide dropping of redundant 'Device Tree Binding' in schema titles - More (unevaluated|additional)Properties fixes in schema child nodes - Drop various redundant minItems equal to maxItems" * tag 'devicetree-for-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (62 commits) of: base: Shift refcount decrement in of_find_last_cache_level() dt-bindings: leds: Add MediaTek MT6370 flashlight dt-bindings: leds: mt6370: Add MediaTek MT6370 current sink type LED indicator dt-bindings: mailbox: Convert mtk-gce to DT schema of: base: make of_device_compatible_match() accept const device node of: Fix "dma-ranges" handling for bus controllers of: fdt: Remove unused struct fdt_scan_status dt-bindings: display: st,stm32-dsi: Handle data-lanes in DSI port node dt-bindings: timer: Add power-domains for TI timer-dm on K3 dt: Add a check for undocumented compatible strings in kernel kbuild: take into account DT_SCHEMA_FILES changes while checking dtbs dt-bindings: interrupt-controller: migrate MIPS CPU interrupt controller text bindings to YAML dt-bindings: i2c: migrate mt7621 text bindings to YAML dt-bindings: power: gpcv2: correct patternProperties dt-bindings: virtio: Convert virtio,pci-iommu to DT schema dt-bindings: timer: arm,arch_timer: Allow dual compatible string dt-bindings: arm: cpus: Add kryo240 compatible dt-bindings: display: bridge: nxp,tda998x: Convert to json-schema dt-bindings: nvmem: u-boot,env: add basic NVMEM cells dt-bindings: remoteproc: qcom,adsp: enforce smd-edge schema ...
2022-10-06Merge tag 'arm-drivers-6.1' of ↵Gravatar Linus Torvalds 6-78/+224
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "The drivers branch for 6.1 is a bit larger than for most releases. Most of the changes come from SoC maintainers for the drivers/soc subsystem: - A new driver for error handling on the NVIDIA Tegra 'control backbone' bus. - A new driver for Qualcomm LLCC/DDR bandwidth measurement - New Rockchip rv1126 and rk3588 power domain drivers - DT binding updates for memory controllers, older Rockchip SoCs, various Mediatek devices, Qualcomm SCM firmware - Minor updates to Hisilicon LPC bus, the Allwinner SRAM driver, the Apple rtkit firmware driver, Tegra firmware - Minor updates for SoC drivers (Samsung, Mediatek, Renesas, Tegra, Qualcomm, Broadcom, NXP, ...) There are also some separate subsystem with downstream maintainers that merge updates this way: - Various updates and new drivers in the memory controller subsystem for Mediatek and Broadcom SoCs - Small set of changes in preparation to add support for FF-A v1.1 specification later, in the Arm FF-A firmware subsystem - debugfs support in the PSCI firmware subsystem" * tag 'arm-drivers-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (149 commits) ARM: remove check for CONFIG_DEBUG_LL_SER3 firmware/psci: Add debugfs support to ease debugging firmware/psci: Print a warning if PSCI doesn't accept PC mode dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support soc: sunxi: sram: Add support for the D1 system control soc: sunxi: sram: Export the LDO control register soc: sunxi: sram: Save a pointer to the OF match data soc: sunxi: sram: Return void from the release function soc: apple: rtkit: Add apple_rtkit_poll soc: imx: add i.MX93 media blk ctrl driver soc: imx: add i.MX93 SRC power domain driver soc: imx: imx8m-blk-ctrl: Use genpd_xlate_onecell soc: imx: imx8mp-blk-ctrl: handle PCIe PHY resets soc: imx: imx8m-blk-ctrl: add i.MX8MP VPU blk ctrl soc: imx: add i.MX8MP HDMI blk ctrl HDCP/HRV_MWR soc: imx: add icc paths for i.MX8MP hsio/hdmi blk ctrl soc: imx: add icc paths for i.MX8MP media blk ctrl ...
2022-09-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netGravatar Jakub Kicinski 1-1/+1
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28Merge tag 'memory-controller-drv-6.1-2' of ↵Gravatar Arnd Bergmann 3-76/+156
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1, part 2 Improvements in Synopsys DesignWare Universal Multi-Protocol Memory Controller Devicetree bindings. The bindings are being split into one related to Synopsys core and into quite different derivative Zynq A05 DDR Memory Controller. Extend the Synopsys bindings with additional properties to match upcoming new device support (Baikal-T1 support). * tag 'memory-controller-drv-6.1-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with IRQs/resets/clocks props dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macros dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device name dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller support Link: https://lore.kernel.org/r/20220926105023.119781-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-23dt-bindings: memory: mt7621: add syscon as compatible stringGravatar Arınç ÜNAL 1-2/+4
The syscon string was introduced because the mt7621 clock driver needs to read some registers creating a regmap from the syscon. The bindings were added before the clock driver was properly mainlined and at first the clock driver was using ralink architecture dependent operations rt_memc_* defined in 'arch/mips/include/asm/mach-ralink/ralink_regs.h'. This string is already there on the memory controller node on mt7621.dtsi. Add syscon as a constant string on the compatible property, now that memc became a syscon. Update the example accordingly. Fixes: 5278e4a181ff ("dt-bindings: memory: add binding for Mediatek's MT7621 SDRAM memory controller") Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-21dt-bindings: memory: snps,dw-umctl2-ddrc: Extend schema with ↵Gravatar Serge Semin 1-1/+60
IRQs/resets/clocks props First of all the DW uMCTL2 DDRC IP-core supports the individual IRQ lines for each standard event: ECC Corrected Error, ECC Uncorrected Error, ECC Address Protection, Scrubber-Done signal, DFI Parity/CRC Error. It's possible that the platform engineers merge them up in the IRQ controller level. So let's add both configuration support to the DT-schema. Secondly the DW uMCTL2 DDRC IP-core can have clock sources like APB reference clock, AXI-ports clock, main DDRC core reference clock and Scrubber low-power clock. In addition to that each clock domain can have a dedicated reset signal. Let's add the properties for at least the denoted clock sources and the corresponding reset controls. Note the IRQs and the phandles order is deliberately not fixed since some of the sources may be absent depending on the IP-core synthesize parameters and the particular platform setups. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910195659.11843-3-Sergey.Semin@baikalelectronics.ru
2022-09-21dt-bindings: memory: snps,dw-umctl2-ddrc: Replace opencoded numbers with macrosGravatar Serge Semin 1-1/+4
Xilinx ZynqMP DDRC-based example contains the opencoded numerical literals in the IRQ lines definition. It doesn't seem justified since the corresponding platform has well defined ARM GIC interface. Let's replace the numbers with the corresponding macros then. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910195659.11843-2-Sergey.Semin@baikalelectronics.ru
2022-09-21dt-bindings: memory: snps,dw-umctl2-ddrc: Use more descriptive device nameGravatar Serge Semin 1-2/+5
The DT-schema name and the corresponding generic compatible string look inappropriate in the current DW uMCTL2 DDRC DT-bindings: 1. DT-schema name contains undefined vendor-prefix. It's supposed to be "snps", not "synopsys". 2. DT-schema name has "ecc" suffix. That is a device property, and has nothing to do with the controller actual name. 3. The controller name is different. It's DW uMCTL2 DDRC. Just DDRC doesn't identify the IP-core in subject. 4. There is no much point in using the IP-core version in the device name since it can be retrieved from the corresponding device CSR. Moreover the DW uMCTL2 DDRC driver doesn't differentiate the IP-core version at the current state. In order to fix all the inconsistencies described above we suggest to rename the DT-schema to "snps,dw-umctl2-ddrc.yaml", deprecate the compatible string "snps,ddrc-3.80a" and define a new generic device name as "snps,dw-umctl2-ddrc". Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910194237.10142-16-Sergey.Semin@baikalelectronics.ru
2022-09-21dt-bindings: memory: synopsys,ddrc-ecc: Detach Zynq DDRC controller supportGravatar Serge Semin 2-43/+58
The Zynq A05 DDRC controller has nothing in common with DW uMCTL2 DDRC: the CSRs layout is absolutely different and it doesn't support IRQs unlike DW uMCTL2 DDR controller of all versions (v1.x, v2.x and v3.x). Thus there is no any reason to have these controllers described in the same bindings. Let's split the DT-schema up. Note since the synopsys,ddrc-ecc.yaml schema describes the Synopsys DW uMCTL2 DDR controller only, we need to accordingly fix the device descriptions. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220910194237.10142-15-Sergey.Semin@baikalelectronics.ru
2022-09-12Merge tag 'memory-controller-drv-mediatek-6.1' of ↵Gravatar Arnd Bergmann 2-1/+6
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1 - MediaTek Add support for the mt8188 SMI memory controller. * tag 'memory-controller-drv-mediatek-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: mt8188: Add SMI Support memory: mtk-smi: Add enable IOMMU SMC command for MM master memory: mtk-smi: Add return value for configure port function dt-bindings: memory: mediatek: Add mt8188 smi binding Link: https://lore.kernel.org/r/20220909153037.824092-4-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-12Merge tag 'memory-controller-drv-brcm-6.1' of ↵Gravatar Arnd Bergmann 1-0/+52
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v6.1 - Broadcom Add support for the Broadcom STB memory controller (BRCMSTB_MEMC). * tag 'memory-controller-drv-brcm-6.1' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: brcmstb_memc: Add Broadcom STB memory controller driver Documentation: sysfs: Document Broadcom STB memc sysfs knobs dt-bindings: memory-controller: Document Broadcom STB MEMC Link: https://lore.kernel.org/r/20220909153037.824092-3-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-09-12dt-bindings: memory-controllers: fsl,imx8m-ddrc: drop Leonard CrestezGravatar Krzysztof Kozlowski 1-1/+1
Emails to Leonard Crestez bounce ("550 5.4.1 Recipient address rejected: Access denied:), so change maintainer to Peng Fan from NXP. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20220817065946.24303-2-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20220909153037.824092-1-krzysztof.kozlowski@linaro.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-08-30dt-bindings: memory: mediatek: Add mt8188 smi bindingGravatar Chengci.Xu 2-1/+6
Add mt8188 smi supporting in the bindings. In mt8188, there are two smi-common HW, one is for vdo(video output), the other is for vpp(video processing pipe). They connect with different smi-larbs, then some setting(bus_sel) is different. Differentiate them with the compatible string. Something like this: IOMMU(VDO) IOMMU(VPP) | | SMI_COMMON_VDO SMI_COMMON_VPP ---------------- ---------------- | | ... | | ... larb0 larb2 ... larb1 larb3 ... Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220817124608.10062-2-chengci.xu@mediatek.com
2022-08-22dt-bindings: memory-controllers: fsl,imx8m-ddrc: restrict opp-table to objectsGravatar Krzysztof Kozlowski 1-1/+2
Simple 'opp-table:true' accepts a boolean property as opp-table, so restrict it to object to properly enferce real OPP table nodes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220818061549.9087-1-krzysztof.kozlowski@linaro.org
2022-08-18dt-bindings: memory-controller: Document Broadcom STB MEMCGravatar Florian Fainelli 1-0/+52
Document the Broadcom STB memory controller which is a trivial binding for now with a set of compatible strings and single register. Since we introduce this binding, the section in Documentation/devicetree/bindings/arm/bcm/brcm,brcmstb.txt is removed and this binding is referenced instead. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> [krzk: correct path in brcm,brcmstb.txt] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220812222533.2428033-2-f.fainelli@gmail.com
2022-08-16dt-bindings: memory: mediatek,smi: Update condition for mt8195 smi nodeGravatar Tinghan Shen 1-1/+10
The max clock items for the dts node with compatible 'mediatek,mt8195-smi-sub-common' should be 3. However, the dtbs_check of such node will get following message, arch/arm64/boot/dts/mediatek/mt8195-evb.dtb: smi@14010000: clock-names: ['apb', 'smi', 'gals0'] is too long From schema: Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.yaml It's because the 'mediatek,mt8195-smi-sub-common' compatible incorrectly matches the 'else' conditions for gen2 HW without gals. Rewrite the 'else' condition to specifically identify the compatibles that utilizing gen2 HW without gals. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220729063208.16799-3-tinghan.shen@mediatek.com
2022-08-10RISC-V: Canaan devicetree fixesGravatar Palmer Dabbelt 1-0/+52
This series should rid us of dtbs_check errors for the RISC-V Canaan k210 based boards. To make keeping it that way a little easier, I changed the Canaan devicetree Makefile so that it would build all of the devicetrees in the directory if SOC_CANAAN. Link: https://lore.kernel.org/all/mhng-85044754-c361-40bc-a6a2-7082f35930bb@palmer-ri-x1c9/ * remotes/palmer/riscv-canaan_dt_schema: riscv: dts: canaan: build all devicetress if SOC_CANAAN riscv: dts: canaan: add specific compatible for kd233's LCD riscv: dts: canaan: fix bus {ranges,reg} warnings riscv: dts: canaan: remove spi-max-frequency from controllers riscv: dts: canaan: use custom compatible for k210 i2s riscv: dts: canaan: fix kd233 display spi frequency riscv: dts: canaan: fix mmc node names riscv: dts: canaan: fix the k210's timer nodes riscv: dts: canaan: fix the k210's memory node dt-bindings: memory-controllers: add canaan k210 sram controller dt-bindings: display: ili9341: document canaan kd233's lcd dt-bindings: display: convert ilitek,ili9341.txt to dt-schema
2022-07-14dt-bindings: memory-controllers: add canaan k210 sram controllerGravatar Conor Dooley 1-0/+52
The k210 U-Boot port has been using the clocks defined in the devicetree to bring up the board's SRAM, but this violates the dt-schema. As such, move the clocks to a dedicated node with the same compatible string & document it. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220705215213.1802496-5-mail@conchuod.ie Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2022-07-01Merge tag 'memory-controller-drv-5.20' of ↵Gravatar Arnd Bergmann 2-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.20 Add MediaTek MT6795 Helio X10 SMI support. * tag 'memory-controller-drv-5.20' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: mtk-smi: Add support for MT6795 Helio X10 dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindings Link: https://lore.kernel.org/r/20220624081828.33649-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-06-07dt-bindings: Drop more redundant 'maxItems/minItems' in if/then schemasGravatar Rob Herring 1-3/+0
Another round from new cases in 5.19-rc of removing redundant minItems/maxItems when 'items' list is specified. This time it is in if/then schemas as the meta-schema was failing to check this case. If a property has an 'items' list, then a 'minItems' or 'maxItems' with the same size as the list is redundant and can be dropped. Note that is DT schema specific behavior and not standard json-schema behavior. The tooling will fixup the final schema adding any unspecified minItems/maxItems. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://lore.kernel.org/r/20220606225137.1536010-1-robh@kernel.org
2022-06-06dt-bindings: memory: mtk-smi: Add MT6795 Helio X10 bindingsGravatar AngeloGioacchino Del Regno 2-0/+2
Add SMI bindings for the MediaTek Helio X10 (MT6795) SoC Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220518091038.22380-2-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-06-03dt-bindings: memory-controllers: ingenic: Split out child node propertiesGravatar Rob Herring 2-32/+46
Binding schemas which define child node properties such as memory controllers with timing properties need a separate schema which can be referenced from child device schemas. This is necessary for unevaluatedProperties checks to work properly. Move the ingenic,nemc child properties to its own file and reference from ingenic,nand.yaml which describes a child NAND controller. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Paul Cercueil <paul@crapouillou.net> Link: https://lore.kernel.org/r/20220525210140.2489866-1-robh@kernel.org
2022-05-26Merge tag 'asm-generic-5.19' of ↵Gravatar Linus Torvalds 1-35/+0
git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic updates from Arnd Bergmann: "The asm-generic tree contains three separate changes for linux-5.19: - The h8300 architecture is retired after it has been effectively unmaintained for a number of years. This is the last architecture we supported that has no MMU implementation, but there are still a few architectures (arm, m68k, riscv, sh and xtensa) that support CPUs with and without an MMU. - A series to add a generic ticket spinlock that can be shared by most architectures with a working cmpxchg or ll/sc type atomic, including the conversion of riscv, csky and openrisc. This series is also a prerequisite for the loongarch64 architecture port that will come as a separate pull request. - A cleanup of some exported uapi header files to ensure they can be included from user space without relying on other kernel headers" * tag 'asm-generic-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: h8300: remove stale bindings and symlink sparc: add asm/stat.h to UAPI compile-test coverage powerpc: add asm/stat.h to UAPI compile-test coverage mips: add asm/stat.h to UAPI compile-test coverage riscv: add linux/bpf_perf_event.h to UAPI compile-test coverage kbuild: prevent exported headers from including <stdlib.h>, <stdbool.h> agpgart.h: do not include <stdlib.h> from exported header csky: Move to generic ticket-spinlock RISC-V: Move to queued RW locks RISC-V: Move to generic spinlocks openrisc: Move to ticket-spinlock asm-generic: qrwlock: Document the spinlock fairness requirements asm-generic: qspinlock: Indicate the use of mixed-size atomics asm-generic: ticket-lock: New generic ticket-based spinlock remove the h8300 architecture
2022-05-26Merge tag 'arm-drivers-5.19' of ↵Gravatar Linus Torvalds 1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM driver updates from Arnd Bergmann: "There are minor updates to SoC specific drivers for chips by Rockchip, Samsung, NVIDIA, TI, NXP, i.MX, Qualcomm, and Broadcom. Noteworthy driver changes include: - Several conversions of DT bindings to yaml format. - Renesas adds driver support for R-Car V4H, RZ/V2M and RZ/G2UL SoCs. - Qualcomm adds a bus driver for the SSC (Snapdragon Sensor Core), and support for more chips in the RPMh power domains and the soc-id. - NXP has a new driver for the HDMI blk-ctrl on i.MX8MP. - Apple M1 gains support for the on-chip NVMe controller, making it possible to finally use the internal disks. This also includes SoC drivers for their RTKit IPC and for the SART DMA address filter. For other subsystems that merge their drivers through the SoC tree, we have - Firmware drivers for the ARM firmware stack including TEE, OP-TEE, SCMI and FF-A get a number of smaller updates and cleanups. OP-TEE now has a cache for firmware argument structures as an optimization, and SCMI now supports the 3.1 version of the specification. - Reset controller updates to Amlogic, ASpeed, Renesas and ACPI drivers - Memory controller updates for Tegra, and a few updates for other platforms" * tag 'arm-drivers-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (159 commits) memory: tegra: Add MC error logging on Tegra186 onward memory: tegra: Add memory controller channels support memory: tegra: Add APE memory clients for Tegra234 memory: tegra: Add Tegra234 support nvme-apple: fix sparse endianess warnings soc/tegra: pmc: Document core domain fields soc: qcom: pdr: use static for servreg_* variables soc: imx: fix semicolon.cocci warnings soc: renesas: R-Car V3U is R-Car Gen4 soc: imx: add i.MX8MP HDMI blk-ctrl soc: imx: imx8m-blk-ctrl: Add i.MX8MP media blk-ctrl soc: imx: add i.MX8MP HSIO blk-ctrl soc: imx: imx8m-blk-ctrl: set power device name soc: qcom: llcc: Add sc8180x and sc8280xp configurations dt-bindings: arm: msm: Add sc8180x and sc8280xp LLCC compatibles soc/tegra: pmc: Select REGMAP dt-bindings: reset: st,sti-powerdown: Convert to yaml dt-bindings: reset: st,sti-picophyreset: Convert to yaml dt-bindings: reset: socfpga: Convert to yaml dt-bindings: reset: snps,axs10x-reset: Convert to yaml ...
2022-05-26Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socGravatar Linus Torvalds 2-6/+75
Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
2022-05-24Merge tag 'pm-5.19-rc1' of ↵Gravatar Linus Torvalds 1-0/+384
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These add support for 'artificial' Energy Models in which power numbers for different entities may be in different scales, add support for some new hardware, fix bugs and clean up code in multiple places. Specifics: - Update the Energy Model support code to allow the Energy Model to be artificial, which means that the power values may not be on a uniform scale with other devices providing power information, and update the cpufreq_cooling and devfreq_cooling thermal drivers to support artificial Energy Models (Lukasz Luba). - Make DTPM check the Energy Model type (Lukasz Luba). - Fix policy counter decrementation in cpufreq if Energy Model is in use (Pierre Gondois). - Add CPU-based scaling support to passive devfreq governor (Saravana Kannan, Chanwoo Choi). - Update the rk3399_dmc devfreq driver (Brian Norris). - Export dev_pm_ops instead of suspend() and resume() in the IIO chemical scd30 driver (Jonathan Cameron). - Add namespace variants of EXPORT[_GPL]_SIMPLE_DEV_PM_OPS and PM-runtime counterparts (Jonathan Cameron). - Move symbol exports in the IIO chemical scd30 driver into the IIO_SCD30 namespace (Jonathan Cameron). - Avoid device PM-runtime usage count underflows (Rafael Wysocki). - Allow dynamic debug to control printing of PM messages (David Cohen). - Fix some kernel-doc comments in hibernation code (Yang Li, Haowen Bai). - Preserve ACPI-table override during hibernation (Amadeusz Sławiński). - Improve support for suspend-to-RAM for PSCI OSI mode (Ulf Hansson). - Make Intel RAPL power capping driver support the RaptorLake and AlderLake N processors (Zhang Rui, Sumeet Pawnikar). - Remove redundant store to value after multiply in the RAPL power capping driver (Colin Ian King). - Add AlderLake processor support to the intel_idle driver (Zhang Rui). - Fix regression leading to no genpd governor in the PSCI cpuidle driver and fix the riscv-sbi cpuidle driver to allow a genpd governor to be used (Ulf Hansson). - Fix cpufreq governor clean up code to avoid using kfree() directly to free kobject-based items (Kevin Hao). - Prepare cpufreq for powerpc's asm/prom.h cleanup (Christophe Leroy). - Make intel_pstate notify frequency invariance code when no_turbo is turned on and off (Chen Yu). - Add Sapphire Rapids OOB mode support to intel_pstate (Srinivas Pandruvada). - Make cpufreq avoid unnecessary frequency updates due to mismatch between hardware and the frequency table (Viresh Kumar). - Make remove_cpu_dev_symlink() clear the real_cpus mask to simplify code (Viresh Kumar). - Rearrange cpufreq_offline() and cpufreq_remove_dev() to make the calling convention for some driver callbacks consistent (Rafael Wysocki). - Avoid accessing half-initialized cpufreq policies from the show() and store() sysfs functions (Schspa Shi). - Rearrange cpufreq_offline() to make the calling convention for some driver callbacks consistent (Schspa Shi). - Update CPPC handling in cpufreq (Pierre Gondois). - Extend dev_pm_domain_detach() doc (Krzysztof Kozlowski). - Move genpd's time-accounting to ktime_get_mono_fast_ns() (Ulf Hansson). - Improve the way genpd deals with its governors (Ulf Hansson). - Update the turbostat utility to version 2022.04.16 (Len Brown, Dan Merillat, Sumeet Pawnikar, Zephaniah E. Loss-Cutler-Hull, Chen Yu)" * tag 'pm-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (94 commits) PM: domains: Trust domain-idle-states from DT to be correct by genpd PM: domains: Measure power-on/off latencies in genpd based on a governor PM: domains: Allocate governor data dynamically based on a genpd governor PM: domains: Clean up some code in pm_genpd_init() and genpd_remove() PM: domains: Fix initialization of genpd's next_wakeup PM: domains: Fixup QoS latency measurements for IRQ safe devices in genpd PM: domains: Measure suspend/resume latencies in genpd based on governor PM: domains: Move the next_wakeup variable into the struct gpd_timing_data PM: domains: Allocate gpd_timing_data dynamically based on governor PM: domains: Skip another warning in irq_safe_dev_in_sleep_domain() PM: domains: Rename irq_safe_dev_in_no_sleep_domain() in genpd PM: domains: Don't check PM_QOS_FLAG_NO_POWER_OFF in genpd PM: domains: Drop redundant code for genpd always-on governor PM: domains: Add GENPD_FLAG_RPM_ALWAYS_ON for the always-on governor powercap: intel_rapl: remove redundant store to value after multiply cpufreq: CPPC: Enable dvfs_possible_from_any_cpu cpufreq: CPPC: Enable fast_switch ACPI: CPPC: Assume no transition latency if no PCCT ACPI: bus: Set CPPC _OSC bits for all and when CPPC_LIB is supported ACPI: CPPC: Check _OSC for flexible address space ...
2022-05-23Merge tag 'edac_updates_for_v5.19_rc1' of ↵Gravatar Linus Torvalds 1-6/+0
git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras Pull EDAC updates from Borislav Petkov: - Switch ghes_edac to use the CPER error reporting routines and simplify the code considerably this way - Rip out the silly edac_align_ptr() contraption which was computing the size of the private structures of each driver and thus allowing for a one-shot memory allocation. This was clearly unnecessary and confusing so switch to simple and boring kmalloc* calls. - Last but not least, the usual garden variety of fixes, cleanups and improvements all over EDAC land * tag 'edac_updates_for_v5.19_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras: EDAC/xgene: Fix typo processsors -> processors EDAC/i5100: Remove unused inline function i5100_nrecmema_dm_buf_id() EDAC: Use kcalloc() EDAC/ghes: Change ghes_hw from global to static EDAC/armada_xp: Use devm_platform_ioremap_resource() EDAC/synopsys: Add a SPDX identifier EDAC/synopsys: Add driver support for i.MX platforms EDAC/dmc520: Don't print an error for each unconfigured interrupt line EDAC/mc: Get rid of edac_align_ptr() EDAC/device: Sanitize edac_device_alloc_ctl_info() definition EDAC/device: Get rid of the silly one-shot memory allocation in edac_device_alloc_ctl_info() EDAC/pci: Get rid of the silly one-shot memory allocation in edac_pci_alloc_ctl_info() EDAC/mc: Get rid of silly one-shot struct allocation in edac_mc_alloc() efi/cper: Reformat CPER memory error location to more readable EDAC/ghes: Unify CPER memory error location reporting efi/cper: Add a cper_mem_err_status_str() to decode error description powerpc/85xx: Remove fsl,85... bindings
2022-05-18Merge tag 'devfreq-next-for-5.19' of ↵Gravatar Rafael J. Wysocki 1-0/+384
git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux Pull devfreq changes for 5.19-rc1 from Chanwoo Choi: "1. Update devfreq core - Add cpu based scaling support to passive governor. Some device like cache might require the dynamic frequency scaling. But, it has very tightly to cpu frequency. So that use passive governor to scale the frequency according to current cpu frequency. To decide the frequency of the device, the governor does one of the following: : Derives the optimal devfreq device opp from required-opps property of the parent cpu opp_table. : Scales the device frequency in proportion to the CPU frequency. So, if the CPUs are running at their max frequency, the device runs at its max frequency. If the CPUs are running at their min frequency, the device runs at its min frequency. It is interpolated for frequencies in between. 2. Update devfreq drivers - Update rk3399_dmc.c as following: : Convert dt-binding document to YAML and deprecate unused properties. : Use Hz units for the device-tree properties of rk3399_dmc. : rk3399_dmc is able to set the idle time before changing the dmc clock. Specify idle time parameters by using nano-second unit on dt bidning. : Add new disable-freq properties to optimize the power-saving feature of rk3399_dmc. : Disable devfreq-event device on remove() to fix unbalanced enable-disable count. : Use devm_pm_opp_of_add_table() : Block PMU (Power-Management Unit) transitions when scaling frequency by ARM Trust Firmware in order to fix the conflict between PMU and DMC (Dynamic Memory Controller)." * tag 'devfreq-next-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/linux: PM / devfreq: passive: Keep cpufreq_policy for possible cpus PM / devfreq: passive: Reduce duplicate code when passive_devfreq case PM / devfreq: Add cpu based scaling support to passive governor PM / devfreq: Export devfreq_get_freq_range symbol within devfreq PM / devfreq: rk3399_dmc: Block PMU during transitions soc: rockchip: power-domain: Manage resource conflicts with firmware PM / devfreq: rk3399_dmc: Avoid static (reused) profile PM / devfreq: rk3399_dmc: Use devm_pm_opp_of_add_table() PM / devfreq: rk3399_dmc: Disable edev on remove() PM / devfreq: rk3399_dmc: Support new *-ns properties PM / devfreq: rk3399_dmc: Support new disable-freq properties PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD PM / devfreq: rk3399_dmc: Drop excess timing properties PM / devfreq: rk3399_dmc: Drop undocumented ondemand DT props dt-bindings: devfreq: rk3399_dmc: Add more disable-freq properties dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds dt-bindings: devfreq: rk3399_dmc: Fix Hz units dt-bindings: devfreq: rk3399_dmc: Deprecate unused/redundant properties dt-bindings: devfreq: rk3399_dmc: Convert to YAML
2022-05-06Merge tag 'tegra-for-5.19-dt-bindings' of ↵Gravatar Arnd Bergmann 1-6/+74
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.19-rc1 Updates the memory controller bindings to properly validate the number of entries in the reg and reg-names properties. * tag 'tegra-for-5.19-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: tegra: Update validation for reg and reg-names Link: https://lore.kernel.org/r/20220506143005.3916655-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-05-05dt-bindings: memory: renesas,rpc-if: Document RZ/G2UL SoCGravatar Biju Das 1-0/+1
Document RZ/G2UL RPC-IF bindings. RZ/G2UL RPC-IF is identical to one found on the RZ/G2L SoC. No driver changes are required as generic compatible string "renesas,rzg2l-rpc-if" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220501082508.25511-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-29dt-bindings: memory: tegra: Update validation for reg and reg-namesGravatar Ashish Mhetre 1-6/+74
From Tegra186 onwards, memory controller support multiple channels. "reg" items are updated with address and size of these channels. Tegra186 has overall 5 memory controller channels. Tegra194 and Tegra234 have overall 17 memory controller channels each. There is one "reg" entry for memory controller stream-ID registers. So update the "reg" property's "minItems" and "maxItems" accordingly in the Tegra186 devicetree documentation. Also update validation for "reg-names" added for these corresponding "reg" items. ABI change due to new bindings is intended but backward compatibility is preserved in driver. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-04-21Merge tag 'memory-controller-drv-5.19' of ↵Gravatar Arnd Bergmann 1-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers Memory controller drivers for v5.19 1. Exynos: Reduce memory usage/allocation in Exynos5422 DMC driver. 2. Renesas: - Add bindings for R-Car H3/M3/E3. - Simplify single/double data register access. 3. Minor cleanups: TI/EMIF and FSL/Corenet. * tag 'memory-controller-drv-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: memory: fsl-corenet-cf: Use helper function devm_platform_ioremap_resource() memory: renesas-rpc-if: Simplify single/double data register access dt-bindings: memory: renesas,rpc-if: Document R-Car H3/M3/E3 support memory: emif: remove unneeded ENOMEM error messages memory: samsung: exynos5422-dmc: Avoid some over memory allocation Link: https://lore.kernel.org/r/20220420072712.12648-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-14dt-bindings: devfreq: rk3399_dmc: Add more disable-freq propertiesGravatar Brian Norris 1-0/+37
DDR DVFS tuning has found that several power-saving features don't have good tradeoffs at higher frequencies -- at higher frequencies, we'll see glitches or other errors. Provide tuning controls so these can be disabled at higher OPPs, and left active only at the lower ones. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2022-04-14dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanosecondsGravatar Brian Norris 1-5/+46
It's inefficient to use the same number of cycles for all OPPs, since lower frequencies make for longer idle times. Let's specify the idle time instead, so software can pick the optimal number of cycles on its own. NB: these bindings aren't used anywhere yet. Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>