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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2023-06-15clk: meson: pll: remove unneeded semicolonGravatar Jiapeng Chong 1-1/+1
2023-06-14clk: mvebu: Use of_address_to_resource()Gravatar Rob Herring 1-5/+3
2023-06-14clk: tegra: tegra124-emc: Fix potential memory leakGravatar Yuan Can 1-0/+2
2023-06-14clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()Gravatar Dan Carpenter 1-1/+1
2023-06-14clk: pxa: fix NULL pointer dereference in pxa3xx_clk_update_accrGravatar Arnd Bergmann 1-1/+1
2023-06-14clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()Gravatar Dan Carpenter 1-2/+2
2023-06-14clk: sifive: Use devm_platform_ioremap_resource()Gravatar Yang Li 1-3/+1
2023-06-14clk: sprd: composite: Simplify determine_rate implementationGravatar Stephen Boyd 3-25/+3
2023-06-13clk: qcom: gpucc-sm6375: Enable runtime pmGravatar Konrad Dybcio 1-2/+17
2023-06-13clk: qcom: gcc-sm6115: Add missing PLL config propertiesGravatar Konrad Dybcio 1-0/+8
2023-06-13clk: qcom: clk-alpha-pll: Add a way to update some bits of test_ctl(_hi)Gravatar Konrad Dybcio 2-4/+17
2023-06-13clk: qcom: gcc-ipq6018: remove duplicate initializersGravatar Arnd Bergmann 1-2/+0
2023-06-13clk: qcom: gcc-ipq9574: Enable crypto clocksGravatar Anusha Rao 1-0/+72
2023-06-13clk: Fix best_parent_rate after moving code into a separate functionGravatar Marek Szyprowski 1-0/+1
2023-06-13clk: qcom: Add lpass audio clock controller driver for SC8280XPGravatar Srinivas Kandagatla 1-0/+23
2023-06-13clk: qcom: Add lpass clock controller driver for SC8280XPGravatar Srinivas Kandagatla 3-0/+74
2023-06-12clk: clk-loongson2: Zero init clk_init_dataGravatar Binbin Zhou 1-1/+1
2023-06-12clk: mediatek: fix of_iomap memory leakGravatar Bosi Zhang 1-2/+5
2023-06-12clk: mediatek: reset: add infra_ao reset support for MT8188Gravatar Runyang Chen 1-0/+24
2023-06-12clk: mediatek: Remove CLK_SET_PARENT from all MSDC core clocksGravatar AngeloGioacchino Del Regno 11-92/+93
2023-06-12clk: mediatek: mux: Stop forcing CLK_SET_RATE_PARENT flagGravatar AngeloGioacchino Del Regno 9-40/+62
2023-06-12clk: si521xx: Switch i2c driver back to use .probe()Gravatar Uwe Kleine-König 1-1/+1
2023-06-12clk: mediatek: mt8365: Fix inverted topclk operationsGravatar Markus Schneider-Pargmann 1-3/+3
2023-06-12clk: composite: Fix handling of high clock ratesGravatar Sebastian Reichel 1-1/+4
2023-06-12clk: meson: a1: Staticize rtc clkGravatar Stephen Boyd 1-1/+1
2023-06-12clk: mediatek: mt8365: Fix index issueGravatar Alexandre Mergnat 1-0/+12
2023-06-12clk: samsung: add CONFIG_OF dependencyGravatar Arnd Bergmann 1-0/+1
2023-06-12clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()Gravatar Yuxing Liu 1-11/+13
2023-06-12clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probeGravatar Zhanhao Hu 1-7/+8
2023-06-12clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probeGravatar Hao Luo 1-4/+4
2023-06-12clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probeGravatar Kai Ma 1-7/+15
2023-06-12clk: imx: composite-8m: Add imx8m_divider_determine_rateGravatar Adam Ford 1-0/+31
2023-06-10clk: qcom: cbf-msm8996: scale CBF clock according to the CPUfreqGravatar Dmitry Baryshkov 2-1/+60
2023-06-08clk: Forbid to register a mux without determine_rateGravatar Maxime Ripard 1-0/+7
2023-06-08clk: tegra: super: Switch to determine_rateGravatar Maxime Ripard 1-4/+11
2023-06-08clk: tegra: periph: Switch to determine_rateGravatar Maxime Ripard 1-5/+11
2023-06-08clk: stm32: composite: Switch to determine_rateGravatar Maxime Ripard 1-11/+21
2023-06-08clk: st: flexgen: Switch to determine_rateGravatar Maxime Ripard 1-7/+8
2023-06-08clk: sprd: composite: Switch to determine_rateGravatar Maxime Ripard 1-5/+11
2023-06-08clk: ingenic: tcu: Switch to determine_rateGravatar Maxime Ripard 1-8/+11
2023-06-08clk: ingenic: cgu: Switch to determine_rateGravatar Maxime Ripard 1-7/+8
2023-06-08clk: imx: scu: Switch to determine_rateGravatar Maxime Ripard 1-1/+18
2023-06-08clk: da8xx: clk48: Switch to determine_rateGravatar Maxime Ripard 1-4/+6
2023-06-08clk: si5351: clkout: Switch to determine_rateGravatar Maxime Ripard 1-8/+10
2023-06-08clk: si5351: msynth: Switch to determine_rateGravatar Maxime Ripard 1-10/+13
2023-06-08clk: si5351: pll: Switch to determine_rateGravatar Maxime Ripard 1-12/+14
2023-06-08clk: si5341: Switch to determine_rateGravatar Maxime Ripard 1-8/+10
2023-06-08clk: cdce706: clkout: Switch to determine_rateGravatar Maxime Ripard 1-5/+6
2023-06-08clk: cdce706: divider: Switch to determine_rateGravatar Maxime Ripard 1-8/+10
2023-06-08clk: axi-clkgen: Switch to determine_rateGravatar Maxime Ripard 1-6/+8