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2011-03-29amd64_edac: Fix potential memleakGravatar Borislav Petkov 1-1/+1
We check the pointers together but at least one of them could be invalid due to failed allocation. Since we cannot continue if either of the two allocations has failed, exit early by freeing them both. Cc: <stable@kernel.org> # 38.x Reported-by: Mauro Carvalho Chehab <mchehab@redhat.com> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-18Merge branch 'for-linus' of ↵Gravatar Linus Torvalds 2-26/+45
git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits) doc: CONFIG_UNEVICTABLE_LRU doesn't exist anymore Update cpuset info & webiste for cgroups dcdbas: force SMI to happen when expected arch/arm/Kconfig: remove one to many l's in the word. asm-generic/user.h: Fix spelling in comment drm: fix printk typo 'sracth' Remove one to many n's in a word Documentation/filesystems/romfs.txt: fixing link to genromfs drivers:scsi Change printk typo initate -> initiate serial, pch uart: Remove duplicate inclusion of linux/pci.h header fs/eventpoll.c: fix spelling mm: Fix out-of-date comments which refers non-existent functions drm: Fix printk typo 'failled' coh901318.c: Change initate to initiate. mbox-db5500.c Change initate to initiate. edac: correct i82975x error-info reported edac: correct i82975x mci initialisation edac: correct commented info fs: update comments to point correct document target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c ... Trivial conflict in fs/eventpoll.c (spelling vs addition)
2011-03-17Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tileGravatar Linus Torvalds 3-1/+264
* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile: (27 commits) arch/tile: support newer binutils assembler shift semantics arch/tile: fix deadlock bugs in rwlock implementation drivers/edac: provide support for tile architecture tile on-chip network driver: sync up with latest fixes arch/tile: support 4KB page size as well as 64KB arch/tile: add some more VMSPLIT options and use consistent naming arch/tile: fix some comments and whitespace arch/tile: export some additional module symbols arch/tile: enhance existing finv_buffer_remote() routine arch/tile: fix two bugs in the backtracer code arch/tile: use extended assembly to inline __mb_incoherent() arch/tile: use a cleaner technique to enable interrupt for cpu_idle() arch/tile: sync up with <arch/sim.h> and <arch/sim_def.h> changes arch/tile: fix reversed test of strict_strtol() return value arch/tile: avoid a simulator warning during bootup arch/tile: export <asm/hardwall.h> to userspace arch/tile: warn and retry if an IPI is not accepted by the target cpu arch/tile: stop disabling INTCTRL_1 interrupts during hypervisor downcalls arch/tile: fix __ndelay etc to work better arch/tile: bug fix: exec'ed task thought it was still single-stepping ... Fix up trivial conflict in arch/tile/kernel/vmlinux.lds.S (percpu alignment vs section naming convention fix)
2011-03-17Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bpGravatar Linus Torvalds 6-1041/+840
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (38 commits) amd64_edac: Fix decode_syndrome types amd64_edac: Fix DCT argument type amd64_edac: Fix ranges signedness amd64_edac: Drop local variable amd64_edac: Fix PCI config addressing types amd64_edac: Fix DRAM base macros amd64_edac: Fix node id signedness amd64_edac: Drop redundant declarations amd64_edac: Enable driver on F15h amd64_edac: Adjust ECC symbol size to F15h amd64_edac: Simplify scrubrate setting PCI: Rename CPU PCI id define amd64_edac: Improve DRAM address mapping amd64_edac: Sanitize ->read_dram_ctl_register amd64_edac: Adjust sys_addr to chip select conversion routine to F15h amd64_edac: Beef up early exit reporting amd64_edac: Revamp online spare handling amd64_edac: Fix channel interleave removal amd64_edac: Correct node interleaving removal amd64_edac: Add support for interleaved region swapping ... Fix up trivial conflict in include/linux/pci_ids.h due to AMD_15H_NB_MISC being renamed as AMD_15H_NB_F3 next to the new AMD_15H_NB_LINK entry.
2011-03-17amd64_edac: Fix decode_syndrome typesGravatar Borislav Petkov 1-4/+4
Those should all be unsigned. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix DCT argument typeGravatar Borislav Petkov 1-5/+4
Fix amd64_debug_display_dimm_sizes() arguments order per convention (pvt is always first). Also, the now second arg denotes the DCT so adjust its type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix ranges signednessGravatar Borislav Petkov 1-4/+5
The dram ranges make sense only as an unsigned type. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Drop local variableGravatar Borislav Petkov 1-3/+2
Use the macro directly instead Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix PCI config addressing typesGravatar Borislav Petkov 1-5/+5
Adjust argument types to the PCI config API's types. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix DRAM base macrosGravatar Borislav Petkov 2-6/+5
Return unsigned u8 values only. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix node id signednessGravatar Borislav Petkov 2-9/+11
A node id can never be negative since we use it as an index into the DRAM ranges array. This also makes one of the BUG_ON conditions redundant. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Drop redundant declarationsGravatar Borislav Petkov 1-8/+0
Those were moved to the mce_amd.h header. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Enable driver on F15hGravatar Borislav Petkov 3-15/+29
Add the PCI device ids required for driver registration. Remove pvt->ctl_name and use the family descriptor directly, instead. Then, bump driver version and fixup its format. Finally, enable DRAM ECC decoding on F15h. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Adjust ECC symbol size to F15hGravatar Borislav Petkov 2-18/+16
F15h has the same ECC symbol size options as F10h revD and later so adjust checks to that. Simplify code a bit. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Simplify scrubrate settingGravatar Borislav Petkov 2-13/+5
Drop per-instance variable and compute min scrubrate dynamically. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Improve DRAM address mappingGravatar Borislav Petkov 2-70/+83
Drop static tables which map the bits in F2x80 to a chip select size in favor of functions doing the mapping with some bit fiddling. Also, add F15 support. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Sanitize ->read_dram_ctl_registerGravatar Borislav Petkov 2-9/+7
This function is relevant for F10h and higher, and it has only one callsite so drop its function pointer from the low_ops struct. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Adjust sys_addr to chip select conversion routine to F15hGravatar Borislav Petkov 1-14/+15
F15h sys_addr to chip select mapping is almost identical to F10h's so reuse that. Rename functions on that path accordingly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Beef up early exit reportingGravatar Borislav Petkov 1-1/+12
Add paranoid checks for the sys address before going off and decoding it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Revamp online spare handlingGravatar Borislav Petkov 2-21/+15
Replace per-DCT macros with smarter ones, drop hack and look for the spare rank on all chip selects on a channel. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Fix channel interleave removalGravatar Borislav Petkov 1-9/+17
Remove the channel interleave select bit properly. See F2x110[DctSelIntLvAddr] for details. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Correct node interleaving removalGravatar Borislav Petkov 1-4/+4
When node interleaving is enabled, a subset of the addr[14:12] bits has to be removed in order to get the normalized DCT address of the DRAM channel. The actual number of bits to remove is determined by F1x[1, 0][7C:40][IntlvEn]. Do this correctly. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Add support for interleaved region swappingGravatar Borislav Petkov 2-0/+40
On revC3 and revE Fam10h machines and later, non-interleaved graphics framebuffer memory under the 16G mark can be swapped with a region located at the bottom of memory so that the GPU can use the interleaved region and thus two channels. Add support for that. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Unify get_error_addressGravatar Borislav Petkov 2-15/+13
The address bits from MC4_STATUS differ only between K8 and the rest so no need for a per-family method. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Simplify decoding pathGravatar Borislav Petkov 3-65/+35
Use the struct mce directly instead of copying from it into a custom struct err_regs. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Adjust channel counting to F15hGravatar Borislav Petkov 1-7/+6
The only difference is that F10h used to sport ganged DCTs and F15h doesn't so adjust the F10h routine and reuse it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup old defines cruftGravatar Borislav Petkov 2-76/+22
Remove unused defines, drop family names from define names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup NBSH cruftGravatar Borislav Petkov 3-27/+8
Remove reporting of errors with UC bit set - this is done by the MCE decoding code anyway and this driver deals with DRAM ECC errors only. UC (NB uncorrectable error) doesn't necessarily mean it is a DRAM error. Remove unused macros while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup NBCFG handlingGravatar Borislav Petkov 2-30/+24
The fact whether we are chipkill capable or not does not have any bearing when computing the channel index on a ganged DCT configuration so remove that. Also, simplify debug statements. Finally, remove old error injection leftovers, while at it. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup NBCTL codeGravatar Borislav Petkov 2-14/+8
Remove family names from macro names, drop single bit defines and comment their meaning instead. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup DCT Select Low/High codeGravatar Borislav Petkov 2-22/+22
Shorten macro names, remove family name from macros, fix macro arguments, shorten debug strings. No functionality change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup Dram Configuration registers handlingGravatar Borislav Petkov 2-37/+24
* Restrict DCT ganged mode check since only Fam10h supports it * Adjust DRAM type detection for BD since it only supports DDR3 * Remove second and thus unneeded DCLR read in k8_early_channel_count() - we do that in read_mc_regs() * Cleanup comments and remove family names from register macros * Remove unused defines There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup DBAM handlingGravatar Borislav Petkov 1-19/+8
Do not read DBAM regs twice and simplify code around them. There should be no functional change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Replace huge bitmasks with a macroGravatar Borislav Petkov 1-10/+9
Replace hard to read hex constants with a continuous masks macro. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Sanitize f10_get_base_addr_offsetGravatar Borislav Petkov 2-48/+50
This function maps the system address to the normalized DCT address. Document what the code does for more clarity and wrap insane bitmasks in a more understandable macro which generates them. Also, reduce number of arguments passed to the function. Finally, rename this function to what it actually does. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Sanitize channel extractionGravatar Borislav Petkov 1-50/+34
Cleanup and simplify f10_determine_channel(); make it more readable. Also drop f10_map_intlv_en_to_shift() in favor of simply counting the bits in F1x124[DramIntlvEn] which is equivalent. There should be no functionality change resulting from this patch. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup chipselect handlingGravatar Borislav Petkov 2-238/+136
Add a struct representing the DRAM chip select base/limit register pairs. Concentrate all CS handling in a single function. Also, add CS looping macros for cleaner, more readable code. While at it, adjust code to F15h. Finally, do smaller macro names cleanups (remove family names from register macros) and debug messages clarification. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Cleanup DHAR handlingGravatar Borislav Petkov 2-24/+23
Adjust to F15h, simplify code, fixup macros. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Remove DRAM base/limit subfields cachingGravatar Borislav Petkov 2-188/+115
Add a struct representing the DRAM base/limit range pairs and remove all cached subfields. Replace them with accessor functions, which actually saves us some space: text data bss dec hex filename 14712 1577 336 16625 40f1 drivers/edac/amd64_edac_mod.o.after 14831 1609 336 16776 4188 drivers/edac/amd64_edac_mod.o.before Also, it simplifies the code a lot allowing to merge the K8 and F10h routines. No functional change. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17amd64_edac: Add support for F15h DCT PCI config accessesGravatar Borislav Petkov 3-75/+146
F15h "multiplexes" between the configuration space of the two DRAM controllers by toggling D18F1x10C[DctCfgSel] while F10h has a different set of registers for DCT0, and DCT1 in extended PCI config space. Add DCT configuration space accessors per family thus wrapping all the different access prerequisites. Clean up code while at it, shorten names. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-17EDAC: Shut up sysfs registration debug codeGravatar Borislav Petkov 1-13/+13
Raise the debug level of these routines so that their output get issued out only when the highest debug level is selected. Otherwise, don't pollute driver debug output. Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-03-10drivers/edac: provide support for tile architectureGravatar Chris Metcalf 3-1/+264
Add tile support for the EDAC driver, which provides unified system error (memory, PCI, etc.) reporting. For now, the TILEPro port reports memory correctable error (CE) only. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2011-02-28dt/powerpc: Eliminate users of of_platform_{,un}register_driverGravatar Grant Likely 2-31/+19
Get rid of old users of of_platform_driver in arch/powerpc. Most of_platform_driver users can be converted to use the platform_bus directly. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2011-02-17edac: correct i82975x error-info reportedGravatar Arvind R 1-16/+37
to edac-core fix the totally wrong info w.r.t page,row,dimm-label previously reported to edac-core by i82975x driver Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-02-17edac: correct i82975x mci initialisationGravatar Arvind R 1-1/+3
corrected mtype, and added dev_name,scrubmode initialisers in i82975x struct mem_ctl initialisation Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-02-17edac: correct commented infoGravatar Arvind R 1-7/+3
wrong comments in i82975x driver corrected Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-02-15Merge branch 'master' into for-nextGravatar Jiri Kosina 1-20/+8
2011-02-10amd64_edac: Fix DIMMs per DCTs outputGravatar Borislav Petkov 1-20/+8
amd64_debug_display_dimm_sizes() reports the distribution of the DIMMs on each DRAM controller and its chip select sizes. Thus, the last don't have anything to do with whether we're running in ganged DCT mode or not - their sizes don't change all of a sudden. Fix that by removing the ganged-check and dump DCT0's config for DCT1 when in ganged mode since they're identical. Reported-and-tested-by: Markus Trippelsdorf <markus@trippelsdorf.de> Signed-off-by: Borislav Petkov <borislav.petkov@amd.com>
2011-01-24edac: i82975x author/maintainer email address changeGravatar Arvind R 1-1/+1
edac-i82975x author/maintainer email address change Signed-off-by: Arvind R. <arvino55@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2011-01-19Kill off warning: ‘inline’ is not at beginning of declarationGravatar Jesper Juhl 1-1/+1
Fix a bunch of warning: ‘inline’ is not at beginning of declaration messages when building a 'make allyesconfig' kernel with -Wextra. These warnings are trivial to kill, yet rather annoying when building with -Wextra. The more we can cut down on pointless crap like this the better (IMHO). A previous patch to do this for a 'allnoconfig' build has already been merged. This just takes the cleanup a little further. Signed-off-by: Jesper Juhl <jj@chaosbits.net> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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