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path: root/drivers/net/dsa/mv88e6xxx/chip.c
AgeCommit message (Expand)AuthorFilesLines
2017-06-13net: dsa: mv88e6xxx: prefix Port Switch ID macrosGravatar Vivien Didelot 1-30/+30
2017-06-13net: dsa: mv88e6xxx: prefix Port Status macrosGravatar Vivien Didelot 1-2/+2
2017-06-09net: dsa: mv88e6xxx: rework jumbo size operationGravatar Vivien Didelot 1-19/+19
2017-06-09net: dsa: mv88e6xxx: rework pause limit operationGravatar Vivien Didelot 1-24/+24
2017-06-09net: dsa: mv88e6xxx: do not prefix ops with g1Gravatar Vivien Didelot 1-54/+54
2017-06-09net: dsa: mv88e6xxx: use bridge state valuesGravatar Vivien Didelot 1-21/+2
2017-06-09net: dsa: mv88e6xxx: add egress mode enumerationGravatar Vivien Didelot 1-5/+6
2017-06-09net: dsa: mv888e6xxx: do not use netdev printingGravatar Vivien Didelot 1-16/+15
2017-06-08net: dsa: mv88e6xxx: do not skip ports on VLAN delGravatar Vivien Didelot 1-4/+0
2017-06-08net: dsa: mv88e6xxx: exclude all ports in new VLANGravatar Vivien Didelot 1-4/+3
2017-06-08net: dsa: mv88e6xxx: define membership on VLAN addGravatar Vivien Didelot 1-5/+11
2017-06-07net: dsa: mv88e6xxx: Have 6161/6123 use EDSA tagsGravatar Andrew Lunn 1-2/+2
2017-06-04net: dsa: mv88e6xxx: mv88e6161 uses mv88e6320 stats snapshotGravatar Andrew Lunn 1-2/+2
2017-06-04net: dsa: mv88e6xxx: 6161 uses global 2 for PHY accessGravatar Andrew Lunn 1-4/+4
2017-06-04net: dsa: mv88e6xxx: rename chip headerGravatar Vivien Didelot 1-1/+1
2017-05-31net: dsa: remove dev arg of dsa_register_switchGravatar Vivien Didelot 1-1/+1
2017-05-31net: dsa: mv88e6xxx: rename PHY PPU accessorsGravatar Vivien Didelot 1-8/+8
2017-05-31net: dsa: mv88e6xxx: provide a PHY setup helperGravatar Vivien Didelot 1-7/+4
2017-05-27net: dsa: mv88e6xxx: handle SERDES error appropriatelyGravatar Vivien Didelot 1-12/+7
2017-05-26dsa: mv88e6xxx: Enable/Disable SERDES on port enable/disableGravatar Andrew Lunn 1-8/+42
2017-05-26net: dsa: mv88e6xxx: mv88e6390X SERDES supportGravatar Andrew Lunn 1-0/+6
2017-05-26net: dsa: mv88e6xxx: Refactor mv88e6352 SERDES code into an opGravatar Andrew Lunn 1-45/+19
2017-05-26net: dsa: mv88e6xxx: Move phy functions into phy.[ch]Gravatar Andrew Lunn 1-231/+2
2017-05-18net: dsa: use switchdev_obj_dump_cb_t everywhereGravatar Vivien Didelot 1-5/+5
2017-05-18net: dsa: include switchdev.h only onceGravatar Vivien Didelot 1-1/+0
2017-05-12net: dsa: mv88e6xxx: add default case to switchGravatar Gustavo A. R. Silva 1-0/+3
2017-05-01net: dsa: mv88e6xxx: add VTU support for 88E6390Gravatar Vivien Didelot 1-0/+18
2017-05-01net: dsa: mv88e6xxx: simplify VTU entry getterGravatar Vivien Didelot 1-38/+24
2017-05-01net: dsa: mv88e6xxx: add VTU Load/Purge operationGravatar Vivien Didelot 1-49/+31
2017-05-01net: dsa: mv88e6xxx: add VTU GetNext operationGravatar Vivien Didelot 1-48/+34
2017-05-01net: dsa: mv88e6xxx: load STU entry with VTU entryGravatar Vivien Didelot 1-104/+4
2017-05-01net: dsa: mv88e6xxx: get STU entry on VTU GetNextGravatar Vivien Didelot 1-1/+1
2017-05-01net: dsa: mv88e6xxx: move STU GetNext operationGravatar Vivien Didelot 1-13/+1
2017-05-01net: dsa: mv88e6xxx: move VTU Data accessorsGravatar Vivien Didelot 1-81/+7
2017-05-01net: dsa: mv88e6xxx: move generic VTU GetNextGravatar Vivien Didelot 1-29/+2
2017-05-01net: dsa: mv88e6xxx: move VTU VID accessorsGravatar Vivien Didelot 1-34/+23
2017-05-01net: dsa: mv88e6xxx: move VTU SID accessorsGravatar Vivien Didelot 1-13/+8
2017-05-01net: dsa: mv88e6xxx: move VTU FID accessorsGravatar Vivien Didelot 1-5/+2
2017-05-01net: dsa: mv88e6xxx: move VTU flushGravatar Vivien Didelot 1-16/+12
2017-05-01net: dsa: mv88e6xxx: move VTU Operation accessorsGravatar Vivien Didelot 1-29/+10
2017-05-01net: dsa: mv88e6xxx: split VTU entry data memberGravatar Vivien Didelot 1-10/+11
2017-05-01net: dsa: mv88e6xxx: add max VID to infoGravatar Vivien Didelot 1-9/+29
2017-04-01net: dsa: mv88e6xxx: add cross-chip bridgingGravatar Vivien Didelot 1-1/+33
2017-04-01net: dsa: mv88e6xxx: remap existing bridge membersGravatar Vivien Didelot 1-0/+20
2017-04-01net: dsa: mv88e6xxx: factorize in-chip bridge mapGravatar Vivien Didelot 1-22/+25
2017-04-01net: dsa: mv88e6xxx: rework in-chip bridgingGravatar Vivien Didelot 1-17/+32
2017-04-01net: dsa: mv88e6xxx: allocate the number of portsGravatar Vivien Didelot 1-1/+1
2017-04-01net: dsa: mv88e6xxx: program the PVT with all onesGravatar Vivien Didelot 1-1/+30
2017-04-01net: dsa: mv88e6xxx: use 4-bit port for PVT dataGravatar Vivien Didelot 1-0/+15
2017-04-01net: dsa: mv88e6xxx: move PVT description in infoGravatar Vivien Didelot 1-0/+22
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