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2024-04-12phy: phy-rockchip-samsung-hdptx: Select CONFIG_RATIONALGravatar Cristian Ciocaltea 1-0/+1
Ensure CONFIG_RATIONAL is selected in order to fix the following link error with some kernel configurations: drivers/phy/rockchip/phy-rockchip-samsung-hdptx.o: in function `rk_hdptx_ropll_tmds_cmn_config': phy-rockchip-samsung-hdptx.c:(.text+0x950): undefined reference to `rational_best_approximation' Fixes: 553be2830c5f ("phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404090540.2l1TEkDF-lkp@intel.com/ Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240408222926.32708-1-cristian.ciocaltea@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: rockchip: naneng-combphy: Fix mux on rk3588Gravatar Sebastian Reichel 1-3/+33
The pcie1l0_sel and pcie1l1_sel bits in PCIESEL_CON configure the mux for PCIe1L0 and PCIe1L1 to either the PIPE Combo PHYs or the PCIe3 PHY. Thus this configuration interfers with the data-lanes configuration done by the PCIe3 PHY. RK3588 has three Combo PHYs. The first one has a dedicated PCIe controller and is not affected by this. For the other two Combo PHYs, there is one mux for each of them. pcie1l0_sel selects if PCIe 1L0 is muxed to Combo PHY 1 when bit is set to 0 or to the PCIe3 PHY when bit is set to 1. pcie1l1_sel selects if PCIe 1L1 is muxed to Combo PHY 2 when bit is set to 0 or to the PCIe3 PHY when bit is set to 1. Currently the code always muxes 1L0 and 1L1 to the Combi PHYs once one of them is being used in PCIe mode. This is obviously wrong when at least one of the ports should be muxed to the PCIe3 PHY. Fix this by introducing Combo PHY identification and then only setting up the required bit. Fixes: a03c44277253 ("phy: rockchip: Add naneng combo phy support for RK3588") Reported-by: Michal Tomek <mtdev79b@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240404-rk3588-pcie-bifurcation-fixes-v1-3-9907136eeafd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bitsGravatar Sebastian Reichel 1-3/+6
Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but does not clear them because of an incorrect write mask. This fixes up the issue by using a newly introduced constant for the write mask. While at it also introduces a proper GENMASK based constant for the PCIE30_PHY_MODE. Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3") Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240404-rk3588-pcie-bifurcation-fixes-v1-2-9907136eeafd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: rockchip-snps-pcie3: fix bifurcation on rk3588Gravatar Michal Tomek 1-16/+8
So far all RK3588 boards use fully aggregated PCIe. CM3588 is one of the few boards using this feature and apparently it is broken. The PHY offers the following mapping options: port 0 lane 0 - always mapped to controller 0 (4L) port 0 lane 1 - to controller 0 or 2 (1L0) port 1 lane 0 - to controller 0 or 1 (2L) port 1 lane 1 - to controller 0, 1 or 3 (1L1) The data-lanes DT property maps these as follows: 0 = no controller (unsupported by the HW) 1 = 4L 2 = 2L 3 = 1L0 4 = 1L1 That allows the following configurations with first column being the mainline data-lane mapping, second column being the downstream name, third column being PCIE3PHY_GRF_CMN_CON0 and PHP_GRF_PCIESEL register values and final column being the user visible lane setup: <1 1 1 1> = AGGREG = [4 0] = x4 (aggregation) <1 1 2 2> = NANBNB = [0 0] = x2 x2 (no bif.) <1 3 2 2> = NANBBI = [1 1] = x2 x1x1 (bif. of port 0) <1 1 2 4> = NABINB = [2 2] = x1x1 x2 (bif. of port 1) <1 3 2 4> = NABIBI = [3 3] = x1x1 x1x1 (bif. of both ports) The driver currently does not program PHP_GRF_PCIESEL correctly, which is fixed by this patch. As a side-effect the new logic is much simpler than the old logic. Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3") Signed-off-by: Michal Tomek <mtdev79b@gmail.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20240404-rk3588-pcie-bifurcation-fixes-v1-1-9907136eeafd@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23phy: constify of_phandle_args in xlateGravatar Krzysztof Kozlowski 2-2/+2
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-16phy: rockchip: Add Samsung HDMI/eDP Combo PHY driverGravatar Cristian Ciocaltea 3-0/+1037
Add driver for the HDMI/eDP TX Combo PHY found on Rockchip RK3588 SoC. The PHY is based on a Samsung IP block and supports HDMI 2.1 TMDS, FRL and eDP links. The maximum data rate is 12Gbps (FRL), while the minimum is 250Mbps (TMDS). Only the TMDS link is currently supported. Co-developed-by: Algea Cao <algea.cao@rock-chips.com> Signed-off-by: Algea Cao <algea.cao@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com> Link: https://lore.kernel.org/r/20240214-phy-hdptx-v4-2-e7974f46c1a7@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-27phy: phy-rockchip-inno-usb2: Add RK3128 supportGravatar Alex Bee 1-0/+57
Add registers to support the 2-port usb2 phy found in RK312x SoC familiy. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20231119121340.109025-3-knaerzche@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-27phy: rockchip-inno-usb2: Split ID interrupt phy registersGravatar Alex Bee 1-29/+70
Commit 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ") added ID detection interrupt registers. However the current implementation assumes that falling and rising edge interrupt are always enabled in registers spanning over subsequent bits. That is not the case for RK3128's version of the phy and this implementation can't be used as-is, since there are bits with different purpose in between. This splits up the register definitions for id_det_en, id_det_en and id_det_clr registers in rising and falling edge variants. It's required as preparation to support RK3128's Innosilicon usb2 phy as well in this driver and matches pretty much to what the vendor does, so I'm not expecting issues for other SoCs with that change. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20231119121340.109025-2-knaerzche@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-13phy: rockchip-inno-usb2: Drop unnecessary DT includesGravatar Rob Herring 1-2/+0
Neither of_address.h or of_platform.h are used in the driver, so drop them. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20231009172923.2457844-17-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-13phy: Use device_get_match_data()Gravatar Rob Herring 2-14/+7
Use preferred device_get_match_data() instead of of_match_device() to get the driver match data. With this, adjust the includes to explicitly include the correct headers. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20231009172923.2457844-15-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22phy: rockchip: inno-dsidphy: Add rv1126 supportGravatar Jagan Teki 1-0/+3
Add support for Rockchip RV1126 DSI-DPHY. The existing 2.5GHz phy timing table added for RK3568 is working as it is for RV1126 as well. Signed-off-by: Jagan Teki <jagan@edgeble.ai> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230731110012.2913742-5-jagan@edgeble.ai Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-17phy: Explicitly include correct DT includesGravatar Rob Herring 5-5/+5
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: add more supported pre-pll ratesGravatar Alex Bee 1-25/+173
This adds a bunch of new pixel clock- and tmds rates to the pre-pll table which are required to get more VESA and some DMT rates working. It has been completely re-calculated to match the min- and max-vco of (750 MHz - 3.2 GHz) requirements. If more than one configuration would have been possible the lowest fbdiv and refdiv (and therefore lowest vco rate) has been preferred. It's important to note, that RK3228 version of the phy does not support fractional dividers. To support the most possible rates for this version also in both 8-bit and 10-bit variant, some rates are not exact. The maximum deviation of the pixel clock is 0.26, which perfectly fits into VESA DMT recommendation of 0.5%. I tested all possible rates on several screens from different manufacturers with both RK3228 and RK3328. Both pre- and post-PLL locking are slighlty faster now. Signed-off-by: Alex Bee <knaerzche@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-7-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: force set_rate on power_onGravatar Huicong Xu 1-0/+13
Regular 8-bit and Deep Color video formats mainly differ in TMDS rate and not in pixel clock rate. When the hdmiphy clock is configured with the same pixel clock rate using clk_set_rate() the clock framework do not signal the hdmi phy driver to set_rate when switching between 8-bit and Deep Color. This result in pre/post pll not being re-configured when switching between regular 8-bit and Deep Color video formats. Fix this by calling set_rate in power_on to force pre pll re-configuration. Signed-off-by: Huicong Xu <xhc@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-6-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg writeGravatar Jonas Karlman 1-2/+4
inno_write is used to configure 0xaa reg, that also hold the POST_PLL_POWER_DOWN bit. When POST_PLL_REFCLK_SEL_TMDS is configured the power down bit is not taken into consideration. Fix this by keeping the power down bit until configuration is complete. Also reorder the reg write order for consistency. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-5-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: remove unused no_c from rk3328 recalc_rateGravatar Jonas Karlman 1-4/+1
no_c is not used in any calculation, lets remove it. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-4-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: round fractal pixclock in rk3328 recalc_rateGravatar Zheng Yang 1-3/+5
inno_hdmi_phy_rk3328_clk_recalc_rate() is returning a rate not found in the pre pll config table when the fractal divider is used. This can prevent proper power_on because a tmdsclock for the new rate is not found in the pre pll config table. Fix this by saving and returning a rounded pixel rate that exist in the pre pll config table. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Zheng Yang <zhengyang@rock-chips.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-3-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy/rockchip: inno-hdmi: use correct vco_div_5 macro on rk3328Gravatar Jonas Karlman 1-2/+2
inno_hdmi_phy_rk3328_clk_set_rate() is using the RK3228 macro when configuring vco_div_5 on RK3328. Fix this by using correct vco_div_5 macro for RK3328. Fixes: 53706a116863 ("phy: add Rockchip Innosilicon hdmi phy") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Link: https://lore.kernel.org/r/20230615171005.2251032-2-jonas@kwiboo.se Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: improve error messageGravatar Sebastian Reichel 1-2/+1
Printing the OF node is not useful, since we get the same information from the device context. Instead print the reg address, that could not be found. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-8-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: simplify getting match dataGravatar Sebastian Reichel 1-8/+4
Simplify the code by directly getting the match data via device_get_match_data() instead of open coding its functionality. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-7-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: simplify phy clock handlingGravatar Sebastian Reichel 1-13/+6
Simplify phyclk handling by using devm_clk_get_optional_enabled to acquire and enable the optional clock. This also fixes a resource leak in driver remove path and adds proper error handling. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-6-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: add rk3588 phy tuning supportGravatar Sebastian Reichel 1-0/+63
On RK3588 some registers need to be tweaked to support waking up from suspend when a USB device is plugged into a port from a suspended PHY. Without this change USB devices only work when they are plugged at boot time. Apart from that it optimizes settings to avoid devices toggling between fullspeed and highspeed mode. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-5-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: add reset supportGravatar Sebastian Reichel 1-0/+38
Add reset handling support, which is needed for proper operation with RK3588. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-4-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: phy-rockchip-inno-usb2: add rk3588 supportGravatar Sebastian Reichel 1-15/+211
Add basic support for the USB2 PHY found in the Rockchip RK3588. Co-developed-by: William Wu <william.wu@rock-chips.com> Signed-off-by: William Wu <william.wu@rock-chips.com> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20230522170324.61349-3-sebastian.reichel@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: rockchip: phy-rockchip-typec: Use devm_platform_get_and_ioremap_resource()Gravatar Yangtao Li 1-2/+1
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by: Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230705090126.26854-2-frank.li@vivo.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-04-12phy: rockchip: remove unused hw_to_inno functionGravatar Tom Rix 1-5/+0
clang with W=1 reports drivers/phy/rockchip/phy-rockchip-inno-dsidphy.c:284:36: error: unused function 'hw_to_inno' [-Werror,-Wunused-function] static inline struct inno_dsidphy *hw_to_inno(struct clk_hw *hw) ^ This function is not used so remove it. Signed-off-by: Tom Rix <trix@redhat.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/20230324132649.2649166-1-trix@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-31phy: rockchip: Add naneng combo phy support for RK3588Gravatar Lucas Tanure 1-0/+184
Add support for RK3588 combo phy This is based on prior work from XiaoDong Huang and Peter Geis fixing this issue specifically for Rockchip 356x. Co-developed-by: Andrew Powers-Holmes <aholmes@omnom.net> Signed-off-by: Andrew Powers-Holmes <aholmes@omnom.net> Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com> Link: https://lore.kernel.org/r/20230314135555.44162-4-lucas.tanure@collabora.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-31phy: rockchip-pcie: remove unused phy_rd_cfg functionGravatar Tom Rix 1-15/+0
clang with W=1 reports drivers/phy/rockchip/phy-rockchip-pcie.c:122:19: error: unused function 'phy_rd_cfg' [-Werror,-Wunused-function] static inline u32 phy_rd_cfg(struct rockchip_pcie_phy *rk_phy, ^ This function is not used, so remove it. Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20230321122503.1783311-1-trix@redhat.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-20phy: rockchip: phy-rockchip-typec: Convert to platform remove callback ↵Gravatar Uwe Kleine-König 1-4/+2
returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230307115900.2293120-23-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-20phy: rockchip: phy-rockchip-inno-hdmi: Convert to platform remove callback ↵Gravatar Uwe Kleine-König 1-4/+2
returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230307115900.2293120-22-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-20phy: rockchip: phy-rockchip-inno-dsidphy: Convert to platform remove ↵Gravatar Uwe Kleine-König 1-4/+2
callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230307115900.2293120-21-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-20phy: rockchip: phy-rockchip-inno-csidphy: Convert to platform remove ↵Gravatar Uwe Kleine-König 1-4/+2
callback returning void The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20230307115900.2293120-20-u.kleine-koenig@pengutronix.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-16phy: rockchip-typec: Fix unsigned comparison with less than zeroGravatar Jiapeng Chong 1-2/+1
The dp and ufp are defined as bool type, the return value type of function extcon_get_state should be int, so the type of dp and ufp are modified to int. ./drivers/phy/rockchip/phy-rockchip-typec.c:827:12-14: WARNING: Unsigned expression compared with zero: dp > 0. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3962 Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/20230213035709.99027-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-14Merge tag 'phy-fixes-6.2' into nextGravatar Vinod Koul 1-1/+3
Merge fixes tag pulled into mainline by Linus into phy/next due to dependency on amlogic patches
2023-02-14phy: rockchip-typec: fix tcphy_get_mode error caseGravatar Neill Kapron 1-2/+2
The existing logic in tcphy_get_mode() can cause the phy to be incorrectly configured to USB UFP or DisplayPort mode when extcon_get_state returns an error code. extcon_get_state() can return 0, 1, or a negative error code. It is possible to get into the failing state with an extcon driver which does not support the extcon connector id specified as the second argument to extcon_get_state(). tcphy_get_mode() ->extcon_get_state() -->find_cable_index_by_id() --->return -EINVAL; Fixes: e96be45cb84e ("phy: Add USB Type-C PHY driver for rk3399") Signed-off-by: Neill Kapron <nkapron@google.com> Reviewed-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230126001013.3707873-1-nkapron@google.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-01-13phy: rockchip-inno-usb2: Fix missing clk_disable_unprepare() in ↵Gravatar Shang XiaoJing 1-1/+3
rockchip_usb2phy_power_on() The clk_disable_unprepare() should be called in the error handling of rockchip_usb2phy_power_on(). Fixes: 0e08d2a727e6 ("phy: rockchip-inno-usb2: add a new driver for Rockchip usb2phy") Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Link: https://lore.kernel.org/r/20221205115823.16957-1-shangxiaojing@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-29phy: rockchip-snps-pcie3: only look for rockchip,pipe-grf on rk3588Gravatar Aurelien Jarno 1-4/+9
The rockchip,pipe-grf property is only used on rk3588, but not on rk3568. Therefore this property is not present on rk3568 devices, leading to the following message: rockchip-snps-pcie3-phy fe8c0000.phy: failed to find rockchip,pipe_grf regmap Fix that by only looking for this property on rk3588. Fixes: 2e9bffc4f713d ("phy: rockchip: Support PCIe v3") Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Link: https://lore.kernel.org/r/20220927051752.53089-1-aurelien@aurel32.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: rockchip-snps-pcie3: Use devm_platform_get_and_ioremap_resource()Gravatar Yang Yingliang 1-3/+1
Use devm_platform_get_and_ioremap_resource() to simplify code. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20220914133728.3781160-1-yangyingliang@huawei.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-20phy: rockchip: inno-dsidphy: Add support for rk3568Gravatar Chris Morgan 1-46/+158
Add support for the Rockchip RK3568 DSI-DPHY. Registers were taken from the BSP kernel driver and wherever possible cross referenced with the TRM. Refactor the code to allow the different compatible strings to set either a max 1GHz timing table (all existing hardware) or a max 2.5GHz timing table (the new RK356x). This works (for me) on both an RK3326 (PX30) and a new RK3566 device. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20220919164616.12492-3-macroalpha82@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-04phy: rockchip-inno-usb2: Return zero after otg syncGravatar Peter Geis 1-4/+6
The otg sync state patch reuses the ret variable, but fails to set it to zero after use. This leads to a situation when the otg port is in peripheral mode where the otg phy aborts halfway through setup. It also fails to account for a failure to register the extcon notifier. Fix this by using our own variable and skipping otg sync in case of failure. Fixes: 8dc60f8da22f ("phy: rockchip-inno-usb2: Sync initial otg state") Reported-by: Markus Reichl <m.reichl@fivetechno.de> Reported-by: Michael Riesch <michael.riesch@wolfvision.net> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Tested-by: Markus Reichl <m.reichl@fivetechno.de> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220902184543.1234835-1-pgwipeout@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-04phy: rockchip: Support PCIe v3Gravatar Shawn Lin 3-0/+329
RK3568 supports PCIe v3 using not Combphy like PCIe v2 on rk3566. It use a dedicated PCIe-phy. Add support for this. Initial support by Shawn Lin, modifications by Peter Geis and Frank Wunderlich. Add data-lanes property for splitting pcie-lanes across controllers. The data-lanes is an array where x=0 means lane is disabled and x > 0 means controller x is assigned to phy lane. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Suggested-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220825193836.54262-4-linux@fw-web.de Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-09-02phy: rockchip: add support for the rk356x variant to rockchip-inno-csidphyGravatar Michael Riesch 1-0/+24
This adds support for variant found in Rockchip RK356x SoCs. Note that only the basic operating mode is supported, in which all four CSI lines are controlled by the Rockchip ISP. Signed-off-by: Michael Riesch <michael.riesch@wolfvision.net> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220720091527.1270365-3-michael.riesch@wolfvision.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-15phy: rockchip-inno-usb2: Ignore OTG IRQs in host modeGravatar Samuel Holland 1-1/+3
When the OTG port is fixed to host mode, the driver does not request its IRQs, nor does it enable those IRQs in hardware. Similarly, the driver should ignore the OTG port IRQs when handling the shared interrupt. Otherwise, it would update the extcon based on an ID pin which may be in an undefined state, or try to queue a uninitialized work item. Fixes: 6a98df08ccd5 ("phy: rockchip-inno-usb2: Fix muxed interrupt support") Reported-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Frank Wunderlich <frank-w@public-files.de> Link: https://lore.kernel.org/r/20220708061434.38115-1-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-05phy: rockchip-inno-usb2: Sync initial otg stateGravatar Peter Geis 1-0/+6
The initial otg state for the phy defaults to device mode. The actual state isn't detected until an ID IRQ fires. Fix this by syncing the ID state during initialization. Fixes: 51a9b2c03dd3 ("phy: rockchip-inno-usb2: Handle ID IRQ") Signed-off-by: Peter Geis <pgwipeout@gmail.com> Reviewed-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220622003140.30365-1-pgwipeout@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-05phy: rockchip-inno-usb2: Prevent incorrect error on probeGravatar Peter Geis 1-1/+1
If a phy supply is designated but isn't available at probe time, an EPROBE_DEFER is returned. Use dev_err_probe to prevent this from incorrectly printing during boot. Signed-off-by: Peter Geis <pgwipeout@gmail.com> Link: https://lore.kernel.org/r/20220625212711.558495-1-pgwipeout@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-05-02phy: rockchip-inno-usb2: Clean up some inconsistent indentingGravatar Jiapeng Chong 1-2/+2
Eliminate the follow smatch warning: drivers/phy/rockchip/phy-rockchip-inno-usb2.c:1203 rockchip_usb2phy_probe() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20220421203038.4550-1-jiapeng.chong@linux.alibaba.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Handle ID IRQGravatar Samuel Holland 1-0/+85
This supports detecting host mode for the OTG port without an extcon. The rv1108 properties are not updated due to lack of documentation. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-7-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Handle bvalid fallingGravatar Samuel Holland 1-9/+9
Some SoCs have a bvalid falling interrupt, in addition to bvalid rising. This interrupt can detect OTG cable plugout immediately, so it can avoid the delay until the next scheduled work. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-6-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Support multi-bit mask propertiesGravatar Samuel Holland 1-1/+1
The "bvalid" and "id" interrupts can trigger on either the rising edge or the falling edge, so each interrupt has two enable bits and two status bits. This change allows using a single property for both bits, checking whether either bit is set. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-5-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-20phy: rockchip-inno-usb2: Do not lock in bvalid IRQ handlerGravatar Samuel Holland 1-4/+0
Clearing the IRQ is atomic, so there is no need to hold the mutex. Signed-off-by: Samuel Holland <samuel@sholland.org> Tested-by: Michael Riesch <michael.riesch@wolfvision.net> Link: https://lore.kernel.org/r/20220414032258.40984-4-samuel@sholland.org Signed-off-by: Vinod Koul <vkoul@kernel.org>