linux.git - Linux kernel source tree

Age	Commit message (Collapse)	Author	Files	Lines
2016-12-16	spi: armada-3700: Set mode bits correctly	Dan Carpenter	1	-1/+1
	We set SPI_RX_DUAL twice instead of setting SPI_TX_DUAL. Fixes: 5762ab71eb24 ("spi: Add support for Armada 3700 SPI Controller") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-14	spi: armada-3700: fix unsigned compare than zero on irq	Colin Ian King	1	-4/+5
	spi->irq is an unsigned integer hence the check if status is less than zero has no effect. Fix this by replacing spi->irq with an int irq so the less than zero compare will correctly detect errors. Issue found with static analysis with CoverityScan, CID1388567 Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Romain Perier <romain.perier@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-08	spi: Add support for Armada 3700 SPI Controller	Romain Perier	1	-0/+923
	Marvell Armada 3700 SoC comprises an SPI Controller. This Controller supports up to 4 SPI slave devices, with dedicated chip selects,supports SPI mode 0/1/2 and 3, CPIO or Fifo mode with DMA transfers and different SPI transfer mode (Single, Dual or Quad). This commit adds basic driver support for FIFO mode. In this mode, dedicated registers are used to store the instruction, the address, the read mode and the data. Write and Read FIFO are used to store the outcoming or incoming data. The data FIFOs are accessible via DMA or by the CPU. Only the CPU is supported for now. Signed-off-by: Romain Perier <romain.perier@free-electrons.com> Tested-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org>