From 1755c4b0372a2cf1e7124956b8cfebcb51083208 Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Tue, 9 Jan 2024 11:49:06 +0000 Subject: dt-bindings: clock: gs101: rename cmu_misc clock-names 'bus' and 'ip' are sufficient because naming is local to the module. As the bindings have not made a release yet, rename the cmu_misc clock-names. Fixes: 0a910f160638 ("dt-bindings: clock: Add Google gs101 clock management unit bindings") Suggested-by: Rob Herring Signed-off-by: Tudor Ambarus Reviewed-by: Sam Protsenko Acked-by: Rob Herring Link: https://lore.kernel.org/r/20240109114908.3623645-2-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/google,gs101-clock.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/clock') diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index 3eebc03a309b..ca7fdada3ff2 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -85,8 +85,8 @@ allOf: clock-names: items: - - const: dout_cmu_misc_bus - - const: dout_cmu_misc_sss + - const: bus + - const: sss additionalProperties: false -- cgit v1.2.3 From f80c43887ab3bea4f8b1e112dc1dcc044904cf7b Mon Sep 17 00:00:00 2001 From: Tudor Ambarus Date: Fri, 19 Jan 2024 11:11:25 +0000 Subject: dt-bindings: clock: google,gs101-clock: add PERIC0 clock management unit Add dt-schema documentation for the Connectivity Peripheral 0 (PERIC0) clock management unit. Reviewed-by: Sam Protsenko Reviewed-by: Peter Griffin Reviewed-by: Rob Herring Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20240119111132.1290455-2-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/google,gs101-clock.yaml | 25 ++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree/bindings/clock') diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index 3eebc03a309b..b1202a4f6593 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -30,14 +30,15 @@ properties: - google,gs101-cmu-top - google,gs101-cmu-apm - google,gs101-cmu-misc + - google,gs101-cmu-peric0 clocks: minItems: 1 - maxItems: 2 + maxItems: 3 clock-names: minItems: 1 - maxItems: 2 + maxItems: 3 "#clock-cells": const: 1 @@ -88,6 +89,26 @@ allOf: - const: dout_cmu_misc_bus - const: dout_cmu_misc_sss + - if: + properties: + compatible: + contains: + const: google,gs101-cmu-peric0 + + then: + properties: + clocks: + items: + - description: External reference clock (24.576 MHz) + - description: Connectivity Peripheral 0 bus clock (from CMU_TOP) + - description: Connectivity Peripheral 0 IP clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: bus + - const: ip + additionalProperties: false examples: -- cgit v1.2.3 From dd4905de4702197f50990be15d359ed9bd0cfa8f Mon Sep 17 00:00:00 2001 From: Varada Pavani Date: Tue, 19 Dec 2023 17:28:33 +0530 Subject: dt-bindings: clock: tesla,fsd: Fix spelling mistake Fix typo 'inteernal' to 'internal' in 'Documentation/devicetree/ bindings/clock/tesla,fsd-clock.yaml'. Signed-off-by: Varada Pavani Link: https://lore.kernel.org/r/20231219115834.65720-1-v.pavani@samsung.com Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/clock') diff --git a/Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml b/Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml index dc808e2f8327..b370a10a23a6 100644 --- a/Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml +++ b/Documentation/devicetree/bindings/clock/tesla,fsd-clock.yaml @@ -12,7 +12,7 @@ maintainers: description: | FSD clock controller consist of several clock management unit - (CMU), which generates clocks for various inteernal SoC blocks. + (CMU), which generates clocks for various internal SoC blocks. The root clock comes from external OSC clock (24 MHz). All available clocks are defined as preprocessor macros in -- cgit v1.2.3 From 455061eb32434d5db11836a4de72ea2f4bdf61c8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Thu, 1 Feb 2024 16:11:38 +0000 Subject: dt-bindings: clock: google,gs101-clock: add PERIC1 clock management unit MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add dt-schema documentation and clock IDs for the Connectivity Peripheral 1 (PERIC1) clock management unit. Signed-off-by: André Draszik Reviewed-by: Sam Protsenko Reviewed-by: Peter Griffin Reviewed-by: Tudor Ambarus Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20240201161258.1013664-3-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/clock/google,gs101-clock.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree/bindings/clock') diff --git a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml index b1202a4f6593..4a74d19cf488 100644 --- a/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml +++ b/Documentation/devicetree/bindings/clock/google,gs101-clock.yaml @@ -31,6 +31,7 @@ properties: - google,gs101-cmu-apm - google,gs101-cmu-misc - google,gs101-cmu-peric0 + - google,gs101-cmu-peric1 clocks: minItems: 1 @@ -93,15 +94,17 @@ allOf: properties: compatible: contains: - const: google,gs101-cmu-peric0 + enum: + - google,gs101-cmu-peric0 + - google,gs101-cmu-peric1 then: properties: clocks: items: - description: External reference clock (24.576 MHz) - - description: Connectivity Peripheral 0 bus clock (from CMU_TOP) - - description: Connectivity Peripheral 0 IP clock (from CMU_TOP) + - description: Connectivity Peripheral 0/1 bus clock (from CMU_TOP) + - description: Connectivity Peripheral 0/1 IP clock (from CMU_TOP) clock-names: items: -- cgit v1.2.3 From 76dedb9c0bb3cf3c6d639d043d7ecc98816053cc Mon Sep 17 00:00:00 2001 From: Sam Protsenko Date: Sat, 24 Feb 2024 14:20:39 -0600 Subject: dt-bindings: clock: exynos850: Add CMU_CPUCLK0 and CMU_CPUCL1 Document CPU clock management unit compatibles and add corresponding clock indices. Exynos850 has two CPU clusters (CL0 and CL1), each containing 4 Cortex-A55 cores. CPU PLLs are generating main CPU clocks for each cluster, and there are alternate ("switch") clocks that can be used temporarily while re-configuring the PLL for the new rate. ACLK, ATCLK, PCLKDBG and PERIPHCLK clocks are driving corresponding buses. CLK_CLUSTERx_SCLK are actual leaf CPU clocks and should be used to change CPU rates. Also some CoreSight clocks can be derived from DBG_USER (debug clock). Signed-off-by: Sam Protsenko Link: https://lore.kernel.org/r/20240224202053.25313-2-semen.protsenko@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../bindings/clock/samsung,exynos850-clock.yaml | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) (limited to 'Documentation/devicetree/bindings/clock') diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml index c752c8985a53..cdc5ded59fe5 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml @@ -36,6 +36,8 @@ properties: - samsung,exynos850-cmu-aud - samsung,exynos850-cmu-cmgp - samsung,exynos850-cmu-core + - samsung,exynos850-cmu-cpucl0 + - samsung,exynos850-cmu-cpucl1 - samsung,exynos850-cmu-dpu - samsung,exynos850-cmu-g3d - samsung,exynos850-cmu-hsi @@ -152,6 +154,46 @@ allOf: - const: dout_core_mmc_embd - const: dout_core_sss + - if: + properties: + compatible: + contains: + const: samsung,exynos850-cmu-cpucl0 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CPUCL0 switch clock (from CMU_TOP) + - description: CPUCL0 debug clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_cpucl0_switch + - const: dout_cpucl0_dbg + + - if: + properties: + compatible: + contains: + const: samsung,exynos850-cmu-cpucl1 + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CPUCL1 switch clock (from CMU_TOP) + - description: CPUCL1 debug clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_cpucl1_switch + - const: dout_cpucl1_dbg + - if: properties: compatible: -- cgit v1.2.3