From 8796fa0f9a08359bb87e859d6010350a9d7da38f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 24 Jan 2024 13:07:44 -0600 Subject: dt-bindings: soc/qcom: Add size constraints on "qcom,rpm-msg-ram" The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. "qcom,rpm-msg-ram" is the former and needs to constrain each entry to a single phandle value. Signed-off-by: Rob Herring Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240124190744.1554625-1-robh@kernel.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml index 031800985b5e..9410404f87f1 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml @@ -35,6 +35,8 @@ properties: description: Phandle to an RPM MSG RAM slice containing the master stats minItems: 1 maxItems: 5 + items: + maxItems: 1 qcom,master-names: $ref: /schemas/types.yaml#/definitions/string-array -- cgit v1.2.3 From 641fde51bdb26c09ea8cdbd82084e93bd88d1fcb Mon Sep 17 00:00:00 2001 From: Anjelique Melendez Date: Thu, 1 Feb 2024 12:44:22 -0800 Subject: dt-bindings: soc: qcom: Add qcom,pbs bindings Add binding for the Qualcomm Programmable Boot Sequencer device. Signed-off-by: Anjelique Melendez Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240201204421.16992-4-quic_amelende@quicinc.com Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/soc/qcom/qcom,pbs.yaml | 46 ++++++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,pbs.yaml (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pbs.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pbs.yaml new file mode 100644 index 000000000000..b502ca72266a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pbs.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,pbs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. Programmable Boot Sequencer + +maintainers: + - Anjelique Melendez + +description: | + The Qualcomm Technologies, Inc. Programmable Boot Sequencer (PBS) + supports triggering power up and power down sequences for clients + upon request. + +properties: + compatible: + items: + - enum: + - qcom,pmi632-pbs + - const: qcom,pbs + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + pmic@0 { + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pbs@7400 { + compatible = "qcom,pmi632-pbs", "qcom,pbs"; + reg = <0x7400>; + }; + }; -- cgit v1.2.3 From 0ebeba917f030811f9ea30cd6c435e5b9ebbed43 Mon Sep 17 00:00:00 2001 From: Abel Vesa Date: Mon, 29 Jan 2024 15:28:29 +0200 Subject: dt-bindings: soc: qcom: qcom,pmic-glink: document X1E80100 compatible Document the X1E80100 compatible used to describe the pmic glink on this platform. Signed-off-by: Abel Vesa Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20240129-x1e80100-pmic-glink-v1-1-e45cf194b964@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml index 61df97ffe1e4..d3f3259ef77d 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,pmic-glink.yaml @@ -32,6 +32,7 @@ properties: - items: - enum: - qcom,sm8650-pmic-glink + - qcom,x1e80100-pmic-glink - const: qcom,sm8550-pmic-glink - const: qcom,pmic-glink @@ -65,6 +66,7 @@ allOf: enum: - qcom,sm8450-pmic-glink - qcom,sm8550-pmic-glink + - qcom,x1e80100-pmic-glink then: properties: orientation-gpios: false -- cgit v1.2.3 From 454436167232c18e2bd5cb904b282bd717837ccc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andr=C3=A9=20Draszik?= Date: Fri, 26 Jan 2024 11:55:16 +0000 Subject: dt-bindings: samsung: exynos-sysreg: gs101-peric0/1 require a clock MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit ... otherwise it won't be accessible. Update the schema to make this obvious. Signed-off-by: André Draszik Link: https://lore.kernel.org/r/20240126115517.1751971-1-andre.draszik@linaro.org Signed-off-by: Krzysztof Kozlowski --- .../devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml index 1794e3799f21..c0c6ce8fc786 100644 --- a/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml +++ b/Documentation/devicetree/bindings/soc/samsung/samsung,exynos-sysreg.yaml @@ -72,6 +72,8 @@ allOf: compatible: contains: enum: + - google,gs101-peric0-sysreg + - google,gs101-peric1-sysreg - samsung,exynos850-cmgp-sysreg - samsung,exynos850-peri-sysreg - samsung,exynos850-sysreg -- cgit v1.2.3 From c9491a16e571d7f33e1d00d1ec4ce9b035bb290c Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 2 Jan 2024 07:17:21 +0200 Subject: dt-bindings: soc: qcom: merge qcom,saw2.txt into qcom,spm.yaml The Qualcomm SPM / SAW2 device is described in two bindigns files: arm/msm/qcom,saw2.txt and soc/qcom/qcom,spm.yaml. Merge the former into the latter, adding detailed device node description. While we are at it, also rename qcom,spm.yaml to qcom,saw2.yaml to follow the actual compatible used for these devices. The regulator property is retained as is. It will be changed in the later patches. Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-1-0472ec237f49@linaro.org Signed-off-by: Bjorn Andersson --- .../devicetree/bindings/soc/qcom/qcom,saw2.yaml | 99 ++++++++++++++++++++++ .../devicetree/bindings/soc/qcom/qcom,spm.yaml | 85 ------------------- 2 files changed, 99 insertions(+), 85 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml delete mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml new file mode 100644 index 000000000000..84b3f01d590c --- /dev/null +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/qcom/qcom,saw2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Subsystem Power Manager / SPM AVS Wrapper 2 (SAW2) + +maintainers: + - Andy Gross + - Bjorn Andersson + +description: | + The Qualcomm Subsystem Power Manager is used to control the peripheral logic + surrounding the application cores in Qualcomm platforms. + + The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the + Adaptive Voltage Scaling (AVS) hardware. The SPM is a programmable + power-controller that transitions a piece of hardware (like a processor or + subsystem) into and out of low power modes via a direct connection to + the PMIC. It can also be wired up to interact with other processors in the + system, notifying them when a low power state is entered or exited. + +properties: + compatible: + items: + - enum: + - qcom,sdm660-gold-saw2-v4.1-l2 + - qcom,sdm660-silver-saw2-v4.1-l2 + - qcom,msm8998-gold-saw2-v4.1-l2 + - qcom,msm8998-silver-saw2-v4.1-l2 + - qcom,msm8909-saw2-v3.0-cpu + - qcom,msm8916-saw2-v3.0-cpu + - qcom,msm8939-saw2-v3.0-cpu + - qcom,msm8226-saw2-v2.1-cpu + - qcom,msm8974-saw2-v2.1-cpu + - qcom,msm8976-gold-saw2-v2.3-l2 + - qcom,msm8976-silver-saw2-v2.3-l2 + - qcom,apq8084-saw2-v2.1-cpu + - qcom,apq8064-saw2-v1.1-cpu + - const: qcom,saw2 + + reg: + items: + - description: Base address and size of the SPM register region + - description: Base address and size of the alias register region + minItems: 1 + + regulator: + type: boolean + description: Indicates that this SPM device acts as a regulator device + device for the core (CPU or Cache) the SPM is attached to. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + + /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */ + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "qcom,kryo"; + device_type = "cpu"; + enable-method = "qcom,kpss-acc-v2"; + qcom,saw = <&saw0>; + reg = <0x0>; + operating-points-v2 = <&cpu_opp_table>; + }; + }; + + saw0: power-manager@f9089000 { + compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; + reg = <0xf9089000 0x1000>; + }; + + - | + + /* + * Example 2: New-gen multi cluster SoC using SAW only for L2; + * This does not require any cpuidle driver, nor any cpu phandle. + */ + power-manager@17812000 { + compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2"; + reg = <0x17812000 0x1000>; + }; + + power-manager@17912000 { + compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2"; + reg = <0x17912000 0x1000>; + }; + +... diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml deleted file mode 100644 index 20c8cd38ff0d..000000000000 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,spm.yaml +++ /dev/null @@ -1,85 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/soc/qcom/qcom,spm.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Subsystem Power Manager - -maintainers: - - Andy Gross - - Bjorn Andersson - -description: | - This binding describes the Qualcomm Subsystem Power Manager, used to control - the peripheral logic surrounding the application cores in Qualcomm platforms. - -properties: - compatible: - items: - - enum: - - qcom,sdm660-gold-saw2-v4.1-l2 - - qcom,sdm660-silver-saw2-v4.1-l2 - - qcom,msm8998-gold-saw2-v4.1-l2 - - qcom,msm8998-silver-saw2-v4.1-l2 - - qcom,msm8909-saw2-v3.0-cpu - - qcom,msm8916-saw2-v3.0-cpu - - qcom,msm8939-saw2-v3.0-cpu - - qcom,msm8226-saw2-v2.1-cpu - - qcom,msm8974-saw2-v2.1-cpu - - qcom,msm8976-gold-saw2-v2.3-l2 - - qcom,msm8976-silver-saw2-v2.3-l2 - - qcom,apq8084-saw2-v2.1-cpu - - qcom,apq8064-saw2-v1.1-cpu - - const: qcom,saw2 - - reg: - description: Base address and size of the SPM register region - maxItems: 1 - -required: - - compatible - - reg - -additionalProperties: false - -examples: - - | - - /* Example 1: SoC using SAW2 and kpss-acc-v2 CPUIdle */ - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu@0 { - compatible = "qcom,kryo"; - device_type = "cpu"; - enable-method = "qcom,kpss-acc-v2"; - qcom,saw = <&saw0>; - reg = <0x0>; - operating-points-v2 = <&cpu_opp_table>; - }; - }; - - saw0: power-manager@f9089000 { - compatible = "qcom,msm8974-saw2-v2.1-cpu", "qcom,saw2"; - reg = <0xf9089000 0x1000>; - }; - - - | - - /* - * Example 2: New-gen multi cluster SoC using SAW only for L2; - * This does not require any cpuidle driver, nor any cpu phandle. - */ - power-manager@17812000 { - compatible = "qcom,msm8998-gold-saw2-v4.1-l2", "qcom,saw2"; - reg = <0x17812000 0x1000>; - }; - - power-manager@17912000 { - compatible = "qcom,msm8998-silver-saw2-v4.1-l2", "qcom,saw2"; - reg = <0x17912000 0x1000>; - }; - -... -- cgit v1.2.3 From 31ac56a59e7a8ed4ccd4831b73a1cc1ad9653b7f Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 2 Jan 2024 07:17:22 +0200 Subject: dt-bindings: soc: qcom: qcom,saw2: add missing compatible strings Define compatible strings for SAW2 units present on MSM8960, IPQ4019 and IPQ8064. There is no need to include SAW version into the compat string, so just use the SoC and SAW2 kind. Also add missing L2 SAW2 compatibles for MSM8974 and APQ8084, they follow the existing CPU SAW2 strings. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-2-0472ec237f49@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml index 84b3f01d590c..2178fea37b8c 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -25,6 +25,9 @@ properties: compatible: items: - enum: + - qcom,ipq4019-saw2-cpu + - qcom,ipq4019-saw2-l2 + - qcom,ipq8064-saw2-cpu - qcom,sdm660-gold-saw2-v4.1-l2 - qcom,sdm660-silver-saw2-v4.1-l2 - qcom,msm8998-gold-saw2-v4.1-l2 @@ -33,10 +36,13 @@ properties: - qcom,msm8916-saw2-v3.0-cpu - qcom,msm8939-saw2-v3.0-cpu - qcom,msm8226-saw2-v2.1-cpu + - qcom,msm8960-saw2-cpu - qcom,msm8974-saw2-v2.1-cpu + - qcom,msm8974-saw2-v2.1-l2 - qcom,msm8976-gold-saw2-v2.3-l2 - qcom,msm8976-silver-saw2-v2.3-l2 - qcom,apq8084-saw2-v2.1-cpu + - qcom,apq8084-saw2-v2.1-l2 - qcom,apq8064-saw2-v1.1-cpu - const: qcom,saw2 -- cgit v1.2.3 From aa4e327fbbf665e96701fa1f53a97ae86b646603 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 2 Jan 2024 07:17:23 +0200 Subject: dt-bindings: soc: qcom: qcom,saw2: define optional regulator node The SAW2 device can optionally provide a voltage regulator supplying the CPU core, cluster or L2 cache. Change the boolean 'regulator' property into a proper regulator description. This breaks schema compatibility for the sake of properly describing the regulator. Reviewed-by: Rob Herring Signed-off-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20240102-saw2-spm-regulator-v7-3-0472ec237f49@linaro.org Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml index 2178fea37b8c..f9306f2a6e99 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -53,7 +53,7 @@ properties: minItems: 1 regulator: - type: boolean + $ref: /schemas/regulator/regulator.yaml# description: Indicates that this SPM device acts as a regulator device device for the core (CPU or Cache) the SPM is attached to. @@ -102,4 +102,17 @@ examples: reg = <0x17912000 0x1000>; }; + - | + /* + * Example 3: SAW2 with the bundled regulator definition. + */ + power-manager@2089000 { + compatible = "qcom,apq8064-saw2-v1.1-cpu", "qcom,saw2"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + + regulator { + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1300000>; + }; + }; ... -- cgit v1.2.3 From aa05f47474c02d38d88c32c633a551911c6fdc40 Mon Sep 17 00:00:00 2001 From: Luca Weiss Date: Sat, 10 Feb 2024 17:28:52 +0100 Subject: dt-bindings: soc: qcom: qcom,saw2: add msm8226 l2 compatible Add the compatible for the SAW2 for L2 cache found on MSM8226. Signed-off-by: Luca Weiss Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240210-msm8226-cpu-v2-1-5d9cb4c35204@z3ntu.xyz Signed-off-by: Bjorn Andersson --- Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree/bindings/soc') diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml index f9306f2a6e99..ca4bce817273 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,saw2.yaml @@ -36,6 +36,7 @@ properties: - qcom,msm8916-saw2-v3.0-cpu - qcom,msm8939-saw2-v3.0-cpu - qcom,msm8226-saw2-v2.1-cpu + - qcom,msm8226-saw2-v2.1-l2 - qcom,msm8960-saw2-cpu - qcom,msm8974-saw2-v2.1-cpu - qcom,msm8974-saw2-v2.1-l2 -- cgit v1.2.3