From 579f8983c4597ccb0011fa7c5a388c322f4b46ef Mon Sep 17 00:00:00 2001 From: Khalil Blaiech Date: Fri, 20 Nov 2020 18:06:06 -0500 Subject: dt-bindings: i2c: mellanox,i2c-mlxbf: convert txt to YAML schema Write the devicetree binding text file associated with the Mellanox BlueField I2C controller in schema file, JSON compatible subset of YAML. Besides, add an entry within MAINTAINERS file. Signed-off-by: Khalil Blaiech Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- .../devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt | 42 ------------ .../bindings/i2c/mellanox,i2c-mlxbf.yaml | 78 ++++++++++++++++++++++ 2 files changed, 78 insertions(+), 42 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt create mode 100644 Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt deleted file mode 100644 index 566ea861aa00..000000000000 --- a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt +++ /dev/null @@ -1,42 +0,0 @@ -Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs - -Required Properties: - -- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". - -- reg : address offset and length of the device registers. The - registers consist of the following set of resources: - 1) Smbus block registers. - 2) Cause master registers. - 3) Cause slave registers. - 4) Cause coalesce registers (if compatible isn't set - to "mellanox,i2c-mlxbf1"). - -- interrupts : interrupt number. - -Optional Properties: - -- clock-frequency : bus frequency used to configure timing registers; - allowed values are 100000, 400000 and 1000000; - those are expressed in Hz. Default is 100000. - -Example: - -i2c@2804000 { - compatible = "mellanox,i2c-mlxbf1"; - reg = <0x02804000 0x800>, - <0x02801200 0x020>, - <0x02801260 0x020>; - interrupts = <57>; - clock-frequency = <100000>; -}; - -i2c@2808800 { - compatible = "mellanox,i2c-mlxbf2"; - reg = <0x02808800 0x600>, - <0x02808e00 0x020>, - <0x02808e20 0x020>, - <0x02808e40 0x010>; - interrupts = <57>; - clock-frequency = <400000>; -}; diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml new file mode 100644 index 000000000000..d2b401d062b9 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.yaml @@ -0,0 +1,78 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mellanox I2C SMBus on BlueField SoCs + +maintainers: + - Khalil Blaiech + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - mellanox,i2c-mlxbf1 + - mellanox,i2c-mlxbf2 + + reg: + minItems: 3 + maxItems: 4 + items: + - description: Smbus block registers + - description: Cause master registers + - description: Cause slave registers + - description: Cause coalesce registers + + interrupts: + maxItems: 1 + + clock-frequency: + enum: [ 100000, 400000, 1000000 ] + description: + bus frequency used to configure timing registers; + The frequency is expressed in Hz. Default is 100000. + +required: + - compatible + - reg + - interrupts + +unevaluatedProperties: false + +if: + properties: + compatible: + contains: + enum: + - mellanox,i2c-mlxbf1 + +then: + properties: + reg: + maxItems: 3 + +examples: + - | + i2c@2804000 { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; + }; + + - | + i2c@2808800 { + compatible = "mellanox,i2c-mlxbf2"; + reg = <0x02808800 0x600>, + <0x02808e00 0x020>, + <0x02808e20 0x020>, + <0x02808e40 0x010>; + interrupts = <57>; + clock-frequency = <400000>; + }; -- cgit v1.2.3 From 730f205190a15439c8896f420cde6bbe50c454c2 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Fri, 20 Nov 2020 01:56:04 +0200 Subject: dt-bindings: i2c: owl: Convert Actions Semi Owl binding to a schema Convert the Actions Semi Owl I2C DT binding to a YAML schema for enabling DT validation. Additionally, add a new compatible string corresponding to the I2C controller found in the S500 variant of the Actions Semi Owl SoCs family. Signed-off-by: Cristian Ciocaltea Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-owl.txt | 29 ---------- Documentation/devicetree/bindings/i2c/i2c-owl.yaml | 62 ++++++++++++++++++++++ 2 files changed, 62 insertions(+), 29 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.txt create mode 100644 Documentation/devicetree/bindings/i2c/i2c-owl.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.txt b/Documentation/devicetree/bindings/i2c/i2c-owl.txt deleted file mode 100644 index 54c05dbdb2e4..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-owl.txt +++ /dev/null @@ -1,29 +0,0 @@ -Actions Semiconductor Owl I2C controller - -Required properties: - -- compatible : Should be one of the following: - - "actions,s700-i2c" for S700 SoC - - "actions,s900-i2c" for S900 SoC -- reg : Offset and length of the register set for the device. -- #address-cells : Should be 1. -- #size-cells : Should be 0. -- interrupts : A single interrupt specifier. -- clocks : Phandle of the clock feeding the I2C controller. - -Optional properties: - -- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and - Fast modes are supported, possible values are 100000 and - 400000. -Examples: - - i2c0: i2c@e0170000 { - compatible = "actions,s900-i2c"; - reg = <0 0xe0170000 0 0x1000>; - #address-cells = <1>; - #size-cells = <0>; - interrupts = ; - clocks = <&clock CLK_I2C0>; - clock-frequency = <100000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/i2c-owl.yaml b/Documentation/devicetree/bindings/i2c/i2c-owl.yaml new file mode 100644 index 000000000000..d96908badf81 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-owl.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/i2c-owl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl I2C Controller + +maintainers: + - Manivannan Sadhasivam + +description: | + This I2C controller is found in the Actions Semi Owl SoCs: + S500, S700 and S900. + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - actions,s500-i2c # Actions Semi S500 compatible SoCs + - actions,s700-i2c # Actions Semi S700 compatible SoCs + - actions,s900-i2c # Actions Semi S900 compatible SoCs + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: Phandle of the clock feeding the I2C controller. + minItems: 1 + + clock-frequency: + description: | + Desired I2C bus clock frequency in Hz. As only Standard and Fast + modes are supported, possible values are 100000 and 400000. + enum: [100000, 400000] + +required: + - compatible + - reg + - interrupts + - clocks + +unevaluatedProperties: false + +examples: + - | + #include + #include + i2c@e0170000 { + compatible = "actions,s900-i2c"; + reg = <0xe0170000 0x1000>; + interrupts = ; + clocks = <&cmu CLK_I2C0>; + clock-frequency = <100000>; + }; + +... -- cgit v1.2.3 From cbfa5b3987c42fe5cd25747aee4fe654b1092fab Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Wed, 9 Dec 2020 22:27:33 +0530 Subject: dt-bindings: i2c: Add compatible string for AM64 SoC Add compatible string for AM64 SoC in device tree binding of OMAP I2C modules as the same IP is used. Signed-off-by: Aswath Govindraju Acked-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-omap.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-omap.txt b/Documentation/devicetree/bindings/i2c/i2c-omap.txt index a44573d7c118..a425b91af48f 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-omap.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-omap.txt @@ -8,6 +8,7 @@ Required properties : "ti,omap4-i2c" for OMAP4+ SoCs "ti,am654-i2c", "ti,omap4-i2c" for AM654 SoCs "ti,j721e-i2c", "ti,omap4-i2c" for J721E SoCs + "ti,am64-i2c", "ti,omap4-i2c" for AM64 SoCs - ti,hwmods : Must be "i2c", n being the instance number (1-based) - #address-cells = <1>; - #size-cells = <0>; -- cgit v1.2.3 From bfbccd70eee93c059e22d0d233f57cc164f03687 Mon Sep 17 00:00:00 2001 From: Yash Shah Date: Tue, 8 Dec 2020 10:25:38 +0530 Subject: dt-bindings: i2c: Update DT binding docs to support SiFive FU740 SoC Add new compatible strings to the DT binding documents to support SiFive FU740-C000. Signed-off-by: Yash Shah Reviewed-by: Rob Herring Signed-off-by: Wolfram Sang --- Documentation/devicetree/bindings/i2c/i2c-ocores.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt index 6b25a80ae8d3..a37c9455b244 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt +++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt @@ -5,8 +5,12 @@ Required properties: "aeroflexgaisler,i2cmst" "sifive,fu540-c000-i2c", "sifive,i2c0" For Opencore based I2C IP block reimplemented in - FU540-C000 SoC. Please refer to sifive-blocks-ip-versioning.txt - for additional details. + FU540-C000 SoC. + "sifive,fu740-c000-i2c", "sifive,i2c0" + For Opencore based I2C IP block reimplemented in + FU740-C000 SoC. + Please refer to sifive-blocks-ip-versioning.txt for + additional details. - reg : bus address start and address range size of device - clocks : handle to the controller clock; see the note below. Mutually exclusive with opencores,ip-clock-frequency -- cgit v1.2.3