From e67e40cff8fc89f74624a0d700b29697d9f28bde Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:37 +0100 Subject: ARM: dts: imx7-tqma7/mba7: convert fsl,pins to uint32-matrix make dtbs_check does not warn about this anymore, but bindings mandate a uint32-matrix. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 242 ++++++++++++++---------------- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 114 +++++++------- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 51 +++---- 3 files changed, 187 insertions(+), 220 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index 3df6dff7734a..2e406cc7d292 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -334,213 +334,191 @@ pinctrl-0 = <&pinctrl_hog_mba7_1>; pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x7c - MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x74 - MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x74 - MX7D_PAD_UART1_RX_DATA__GPIO4_IO0 0x74 - MX7D_PAD_UART1_TX_DATA__GPIO4_IO1 0x74 - MX7D_PAD_UART2_RX_DATA__GPIO4_IO2 0x74 - >; + fsl,pins = + , + , + , + , + , + ; }; pinctrl_ecspi2: ecspi2grp { - fsl,pins = < - MX7D_PAD_ECSPI2_MISO__ECSPI2_MISO 0x7c - MX7D_PAD_ECSPI2_MOSI__ECSPI2_MOSI 0x74 - MX7D_PAD_ECSPI2_SCLK__ECSPI2_SCLK 0x74 - MX7D_PAD_ECSPI2_SS0__ECSPI2_SS0 0x74 - >; + fsl,pins = + , + , + , + ; }; pinctrl_enet1: enet1grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x02 - MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x00 - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x71 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x71 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x71 - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x71 - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x71 - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x71 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x79 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x79 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x79 - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x79 - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x79 - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x79 + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + , /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */ - MX7D_PAD_ENET1_COL__GPIO7_IO15 0x40000070 + , /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */ - MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078 - >; + ; }; pinctrl_flexcan1: flexcan1grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO12__FLEXCAN1_RX 0x5a - MX7D_PAD_GPIO1_IO13__FLEXCAN1_TX 0x52 - >; + fsl,pins = + , + ; }; pinctrl_flexcan2: flexcan2grp { - fsl,pins = < - MX7D_PAD_GPIO1_IO14__FLEXCAN2_RX 0x5a - MX7D_PAD_GPIO1_IO15__FLEXCAN2_TX 0x52 - >; + fsl,pins = + , + ; }; pinctrl_hog_mba7_1: hogmba71grp { - fsl,pins = < + fsl,pins = /* Limitation: WDOG2_B / WDOG2_RESET not usable */ - MX7D_PAD_ENET1_RX_CLK__GPIO7_IO13 0x4000007c - MX7D_PAD_ENET1_CRS__GPIO7_IO14 0x40000074 + , + , /* #BOOT_EN */ - MX7D_PAD_UART2_TX_DATA__GPIO4_IO3 0x40000010 - >; + ; }; pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX7D_PAD_I2C2_SCL__I2C2_SCL 0x40000078 - MX7D_PAD_I2C2_SDA__I2C2_SDA 0x40000078 - >; + fsl,pins = + , + ; }; pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX7D_PAD_I2C3_SCL__I2C3_SCL 0x40000078 - MX7D_PAD_I2C3_SDA__I2C3_SDA 0x40000078 - >; + fsl,pins = + , + ; }; pinctrl_pca9555: pca95550grp { - fsl,pins = < - MX7D_PAD_ENET1_TX_CLK__GPIO7_IO12 0x78 - >; + fsl,pins = + ; }; pinctrl_sai1: sai1grp { - fsl,pins = < - MX7D_PAD_SAI1_MCLK__SAI1_MCLK 0x11 - MX7D_PAD_SAI1_RX_BCLK__SAI1_RX_BCLK 0x1c - MX7D_PAD_SAI1_RX_DATA__SAI1_RX_DATA0 0x1c - MX7D_PAD_SAI1_RX_SYNC__SAI2_RX_SYNC 0x1c + fsl,pins = + , + , + , + , - MX7D_PAD_SAI1_TX_BCLK__SAI1_TX_BCLK 0x1c - MX7D_PAD_SAI1_TX_DATA__SAI1_TX_DATA0 0x14 - MX7D_PAD_SAI1_TX_SYNC__SAI1_TX_SYNC 0x14 - >; + , + , + ; }; pinctrl_uart3: uart3grp { - fsl,pins = < - MX7D_PAD_UART3_RX_DATA__UART3_DCE_RX 0x7e - MX7D_PAD_UART3_TX_DATA__UART3_DCE_TX 0x76 - MX7D_PAD_UART3_CTS_B__UART3_DCE_CTS 0x76 - MX7D_PAD_UART3_RTS_B__UART3_DCE_RTS 0x7e - >; + fsl,pins = + , + , + , + ; }; pinctrl_uart4: uart4grp { - fsl,pins = < - MX7D_PAD_SAI2_TX_SYNC__UART4_DCE_RX 0x7e - MX7D_PAD_SAI2_TX_BCLK__UART4_DCE_TX 0x76 - MX7D_PAD_SAI2_RX_DATA__UART4_DCE_CTS 0x76 - MX7D_PAD_SAI2_TX_DATA__UART4_DCE_RTS 0x7e - >; + fsl,pins = + , + , + , + ; }; pinctrl_uart5: uart5grp { - fsl,pins = < - MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x7e - MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x76 - >; + fsl,pins = + , + ; }; pinctrl_uart6: uart6grp { - fsl,pins = < - MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x7d - MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x75 - MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x75 - MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x7d - >; + fsl,pins = + , + , + , + ; }; pinctrl_uart7: uart7grp { - fsl,pins = < - MX7D_PAD_EPDC_DATA12__UART7_DCE_RX 0x7e - MX7D_PAD_EPDC_DATA13__UART7_DCE_TX 0x76 - MX7D_PAD_EPDC_DATA15__UART7_DCE_CTS 0x76 + fsl,pins = + , + , + , /* Limitation: RTS is not connected */ - MX7D_PAD_EPDC_DATA14__UART7_DCE_RTS 0x7e - >; + ; }; pinctrl_usdhc1_gpio: usdhc1grp_gpio { - fsl,pins = < + fsl,pins = /* WP */ - MX7D_PAD_SD1_WP__GPIO5_IO1 0x7c + , /* CD */ - MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x7c + , /* VSELECT */ - MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 - >; + ; }; pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5e - MX7D_PAD_SD1_CLK__SD1_CLK 0x57 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5e - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5e - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5e - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5e - >; + fsl,pins = + , + , + , + , + , + ; }; pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5a - MX7D_PAD_SD1_CLK__SD1_CLK 0x57 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a - >; + fsl,pins = + , + , + , + , + , + ; }; pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x5b - MX7D_PAD_SD1_CLK__SD1_CLK 0x57 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b - >; + fsl,pins = + , + , + , + , + , + ; }; }; &iomuxc_lpsr { pinctrl_pwm1: pwm1grp { - fsl,pins = < + fsl,pins = /* LCD_CONTRAST */ - MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x50 - >; + ; }; pinctrl_usbotg1: usbotg1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO04__USB_OTG1_OC 0x5c - MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x59 - >; + fsl,pins = + , + ; }; pinctrl_wdog1: wdog1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 - >; + fsl,pins = + ; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 3fc3130f9def..e6e40747d5b9 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -163,91 +163,83 @@ &iomuxc { pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078 - MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078 - >; + fsl,pins = + , + ; }; pinctrl_pmic1: pmic1grp { - fsl,pins = < - MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C - >; + fsl,pins = + ; }; pinctrl_qspi: qspigrp { - fsl,pins = < - MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A - MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A - MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A - MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A - MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11 - MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54 - MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54 - >; + fsl,pins = + , + , + , + , + , + , + ; }; pinctrl_qspi_reset: qspi_resetgrp { - fsl,pins = < + fsl,pins = /* #QSPI_RESET */ - MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52 - >; + ; }; pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x56 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 - >; + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; }; pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5a - MX7D_PAD_SD3_CLK__SD3_CLK 0x51 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a - >; + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; }; pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x5b - MX7D_PAD_SD3_CLK__SD3_CLK 0x51 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b - MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b - >; + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; }; }; &iomuxc_lpsr { pinctrl_wdog1: wdog1grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 - >; + fsl,pins = + ; }; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 32bf9fa9d00e..79a6d82b453a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -48,46 +48,43 @@ pinctrl-0 = <&pinctrl_hog_mba7_1>; pinctrl_enet2: enet2grp { - fsl,pins = < - MX7D_PAD_SD2_CD_B__ENET2_MDIO 0x02 - MX7D_PAD_SD2_WP__ENET2_MDC 0x00 - MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x71 - MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x71 - MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x71 - MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x71 - MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x71 - MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x71 - MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x79 - MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x79 - MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x79 - MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x79 - MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x79 - MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x79 + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + , /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */ - MX7D_PAD_EPDC_BDR0__GPIO2_IO28 0x40000070 + , /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */ - MX7D_PAD_EPDC_PWR_STAT__GPIO2_IO31 0x40000078 - >; + ; }; pinctrl_pcie: pciegrp { - fsl,pins = < + fsl,pins = /* #pcie_wake */ - MX7D_PAD_EPDC_PWR_COM__GPIO2_IO30 0x70 + , /* #pcie_rst */ - MX7D_PAD_SD2_CLK__GPIO5_IO12 0x70 + , /* #pcie_dis */ - MX7D_PAD_EPDC_BDR1__GPIO2_IO29 0x70 - >; + ; }; }; &iomuxc_lpsr { pinctrl_usbotg2: usbotg2grp { - fsl,pins = < - MX7D_PAD_LPSR_GPIO1_IO06__USB_OTG2_OC 0x5c - MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x59 - >; + fsl,pins = + , + ; }; }; -- cgit v1.2.3 From d32fb60fc4220fb974d517d49c4df488561f9819 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:38 +0100 Subject: ARM: dts: imx7[d]-mba7: Move ethernet PHY reset into PHY node Split pinctrl as well. 'reset-deassert-us' is added with a small safe margin. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 13 ++++++++++--- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 13 ++++++++++--- 2 files changed, 20 insertions(+), 6 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index 2e406cc7d292..c2be1a75f70d 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -214,8 +214,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1>; phy-mode = "rgmii-id"; - phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>; - phy-reset-duration = <1>; phy-supply = <®_fec1_pwdn>; phy-handle = <ðphy1_0>; fsl,magic-packet; @@ -228,10 +226,15 @@ ethphy1_0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1_phy>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; ti,clk-output-sel = ; + reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <500>; }; }; }; @@ -366,7 +369,11 @@ , , , - , + ; + }; + + pinctrl_enet1_phy: enet1phygrp { + fsl,pins = /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */ , /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */ diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 79a6d82b453a..4ea1801a7aed 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -21,8 +21,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet2>; phy-mode = "rgmii-id"; - phy-reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; - phy-reset-duration = <1>; phy-supply = <®_fec2_pwdn>; phy-handle = <ðphy2_0>; fsl,magic-packet; @@ -35,10 +33,15 @@ ethphy2_0: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet2_phy>; ti,rx-internal-delay = ; ti,tx-internal-delay = ; ti,fifo-depth = ; ti,clk-output-sel = ; + reset-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <500>; }; }; }; @@ -62,7 +65,11 @@ , , , - , + ; + }; + + pinctrl_enet2_phy: enet2phygrp { + fsl,pins = /* Reset: SION, 100kPU, SRE_FAST, DSE_X1 */ , /* INT/PWDN: SION, 100kPU, HYS, SRE_FAST, DSE_X1 */ -- cgit v1.2.3 From 7d37d9df42ad9dc5a792fa1cb86301e72e76bb3a Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:39 +0100 Subject: ARM: dts: imx7[d]-mba7: disable USB OC on USB host and USB OTG2 USB host is an HSIC interface directly connected to a USB hub. USB OTG2 is a direct connection to Mini PCIe interface without any OC signaling. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 1 + arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 1 + 2 files changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index c2be1a75f70d..2aef830cf1f2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -590,6 +590,7 @@ }; &usbh { + disable-over-current; status = "okay"; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 4ea1801a7aed..d3a6b81fb1dc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -112,6 +112,7 @@ srp-disable; hnp-disable; adp-disable; + disable-over-current; dr_mode = "host"; status = "okay"; }; -- cgit v1.2.3 From ad3af2957802e3c44aee91aa61c5a1de9699deb7 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:40 +0100 Subject: ARM: dts: imx7[d]-mba7: disable PCIe interface Using internal PHY refclk is not supported yet. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index d3a6b81fb1dc..34adf76b713e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -102,7 +102,7 @@ /* probe deferral not supported */ /* pcie-bus-supply = <®_mpcie_1v5>; */ reset-gpio = <&gpio5 12 GPIO_ACTIVE_LOW>; - status = "okay"; + status = "disabled"; }; &usbotg2 { -- cgit v1.2.3 From 90ca55dc1382887f9e63460dca092b9b7a79db03 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:41 +0100 Subject: ARM: dts: imx7[d]-mba7: hog Mini PCIe signals PCIE_DIS & PCIE_RST (correctly named W_DISABLE# & PERST#) affect USB devices as well. So hog them to make USB devices attached to Mini PCIe connector available, despite PCIe being disabled. Supply voltages are enabled unconditionally. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 34adf76b713e..8f2f3898d9d1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -46,9 +46,25 @@ }; }; +&gpio2 { + pcie-dis-hog { + gpio-hog; + gpios = <29 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pcie-dis"; + }; + + pcie-rst-hog { + gpio-hog; + gpios = <12 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "pcie-rst"; + }; +}; + &iomuxc { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_hog_mba7_1>; + pinctrl-0 = <&pinctrl_hog_mba7_1>, <&pinctrl_hog_pcie>; pinctrl_enet2: enet2grp { fsl,pins = @@ -76,15 +92,19 @@ ; }; - pinctrl_pcie: pciegrp { + pinctrl_hog_pcie: hogpciegrp { fsl,pins = - /* #pcie_wake */ - , /* #pcie_rst */ , /* #pcie_dis */ ; }; + + pinctrl_pcie: pciegrp { + fsl,pins = + /* #pcie_wake */ + ; + }; }; &iomuxc_lpsr { -- cgit v1.2.3 From d78dd8472e52ecbfe3b37233ce02e6d94dbb57d3 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:42 +0100 Subject: ARM: dts: imx7-mba7: Mark gpio-buttons as wakeup-source I2C expander is capable of generating an IRQ during powersave, so the attached buttons can be used for waking up the system. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index 2aef830cf1f2..bc5d2e4f0eb1 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -32,11 +32,18 @@ gpio_buttons: gpio-keys { compatible = "gpio-keys"; + /* + * NOTE: These buttons are attached to a GPIO-expander. + * Enabling wakeup-source, enables wakeup on all inputs. + * If PE_GPIO[3..6] are used as inputs, they cause a + * wakeup as well. + */ button-0 { /* #SWITCH_A */ label = "S11"; linux,code = ; gpios = <&pca9555 13 GPIO_ACTIVE_LOW>; + wakeup-source; }; button-1 { @@ -44,6 +51,7 @@ label = "S12"; linux,code = ; gpios = <&pca9555 14 GPIO_ACTIVE_LOW>; + wakeup-source; }; button-2 { @@ -51,6 +59,7 @@ label = "S13"; linux,code = ; gpios = <&pca9555 15 GPIO_ACTIVE_LOW>; + wakeup-source; }; }; -- cgit v1.2.3 From f8d998b00e6f681bc8c7b4124e8d51b035e23389 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:43 +0100 Subject: ARM: dts: imx7-mba7: Enable SNVS power key This allows using S10 for power down / shutdown. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index bc5d2e4f0eb1..a66414098176 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -554,6 +554,10 @@ status = "okay"; }; +&snvs_pwrkey { + status = "okay"; +}; + &uart3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart3>; -- cgit v1.2.3 From 123098a15dde63d89c367bda871c04d1a8d8d34c Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:44 +0100 Subject: ARM: dts: imx7-mba7: Add RTC aliases Ensure the RTC devices are numbered correctly. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index a66414098176..7b7bc86265fc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -18,6 +18,8 @@ mmc0 = &usdhc3; mmc1 = &usdhc1; /delete-property/ mmc2; + rtc0 = &ds1339; + rtc1 = &snvs_rtc; }; beeper { -- cgit v1.2.3 From 1c8b4df70c9f641e91142672dc5e5ca4cb60ee86 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:45 +0100 Subject: ARM: dts: imx7-mba7: Add SPI1_SS0 as chip select 3 ECSPI1.SS0 was missing in the list. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index 7b7bc86265fc..e887889816c7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -209,9 +209,9 @@ &ecspi1 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; + pinctrl-0 = <&pinctrl_ecspi1>, <&pinctrl_ecspi1_ss0>; cs-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>, <&gpio4 1 GPIO_ACTIVE_LOW>, - <&gpio4 2 GPIO_ACTIVE_LOW>; + <&gpio4 2 GPIO_ACTIVE_LOW>, <&gpio4 19 GPIO_ACTIVE_LOW>; status = "okay"; }; @@ -357,6 +357,12 @@ ; }; + pinctrl_ecspi1_ss0: ecspi1ss0grp { + fsl,pins = < + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x74 + >; + }; + pinctrl_ecspi2: ecspi2grp { fsl,pins = , -- cgit v1.2.3 From 908bfeb6a72fbd074c26e721de666b5bd5582fbe Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:46 +0100 Subject: ARM: dts: imx7-tqma7: Add i2c bus recovery Add the pin muxing and GPIO settings for SCL/SDA for i2c1. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index e6e40747d5b9..a68f567010f2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -30,8 +30,11 @@ }; &i2c1 { - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-1 = <&pinctrl_i2c1_recovery>; + scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; clock-frequency = <100000>; status = "okay"; @@ -168,6 +171,12 @@ ; }; + pinctrl_i2c1_recovery: i2c1recoverygrp { + fsl,pins = + , + ; + }; + pinctrl_pmic1: pmic1grp { fsl,pins = ; -- cgit v1.2.3 From 8dc2bd48227925a4f530f3fc5fa7bb1cb9c9286b Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:47 +0100 Subject: ARM: dts: imx7-mba7: Add i2c bus recovery Add the pin muxing and GPIO settings for SCL/SDA for i2c2 & i2c3. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index e887889816c7..f72fd912e1a6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -309,8 +309,11 @@ &i2c2 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-1 = <&pinctrl_i2c2_recovery>; + scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 11 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; tlv320aic32x4: audio-codec@18 { @@ -338,8 +341,11 @@ &i2c3 { clock-frequency = <100000>; - pinctrl-names = "default"; + pinctrl-names = "default", "gpio"; pinctrl-0 = <&pinctrl_i2c3>; + pinctrl-1 = <&pinctrl_i2c3_recovery>; + scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; status = "okay"; }; @@ -424,12 +430,24 @@ ; }; + pinctrl_i2c2_recovery: i2c2recoverygrp { + fsl,pins = + , + ; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = , ; }; + pinctrl_i2c3_recovery: i2c3recoverygrp { + fsl,pins = + , + ; + }; + pinctrl_pca9555: pca95550grp { fsl,pins = ; -- cgit v1.2.3 From c4d9a26b088310896ad34e2bd0716591967f3e94 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:48 +0100 Subject: ARM: dts: imx7-tqma7: fix EEPROM compatible for SE97BTP 0x56 is the EEPROM component of SE97BTP. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index a68f567010f2..c67f73b0ed5e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -152,7 +152,7 @@ }; at24c02: eeprom@56 { - compatible = "atmel,24c02"; + compatible = "nxp,se97b", "atmel,24c02"; reg = <0x56>; pagesize = <16>; status = "okay"; -- cgit v1.2.3 From cfda4a44e6e2dda617a7ad6a6b8934c6fc703545 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:49 +0100 Subject: ARM: dts: imx7-mba7: Fix iomuxc node names The node name must end with 'grp' Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index f72fd912e1a6..ac905615ee03 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -504,7 +504,7 @@ ; }; - pinctrl_usdhc1_gpio: usdhc1grp_gpio { + pinctrl_usdhc1_gpio: usdhc1_gpiogrp { fsl,pins = /* WP */ , @@ -524,7 +524,7 @@ ; }; - pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { + pinctrl_usdhc1_100mhz: usdhc1_100mhzgrp { fsl,pins = , , @@ -534,7 +534,7 @@ ; }; - pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { + pinctrl_usdhc1_200mhz: usdhc1_200mhzgrp { fsl,pins = , , -- cgit v1.2.3 From e7073f96f124715220d963739e5702924eee23f8 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:50 +0100 Subject: ARM: dts: imx7-tqma7: Fix iomuxc node names The node name must end with 'grp' Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index c67f73b0ed5e..53c84393200c 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -214,7 +214,7 @@ ; }; - pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { + pinctrl_usdhc3_100mhz: usdhc3_100mhzgrp { fsl,pins = , , @@ -229,7 +229,7 @@ ; }; - pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { + pinctrl_usdhc3_200mhz: usdhc3_200mhzgrp { fsl,pins = , , -- cgit v1.2.3 From d430a7e0e181d0cfc89289f11cce171e43474745 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:51 +0100 Subject: ARM: dts: imx7-mba7: restrict usdhc interface modes USDHC1 is directly connected to an SD card, so disable other interface modes. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index ac905615ee03..1b1eac33a70f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -655,6 +655,8 @@ vmmc-supply = <®_sd1_vmmc>; bus-width = <4>; no-1-8-v; + no-sdio; + no-emmc; status = "okay"; }; -- cgit v1.2.3 From e498d366c2e5e7405dd661018cad87f31ee3fb72 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:52 +0100 Subject: ARM: dts: imx7-tqma7: restrict usdhc interface modes USDHC3 is directly connected to an eMMC, so disable other interface modes. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 53c84393200c..95c0f3139441 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -279,6 +279,8 @@ assigned-clock-rates = <400000000>; bus-width = <8>; non-removable; + no-sd; + no-sdio; vmmc-supply = <&vgen4_reg>; vqmmc-supply = <&sw2_reg>; status = "okay"; -- cgit v1.2.3 From 10a568290489b969e869e6996aa85b0174c0adf5 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:53 +0100 Subject: ARM: dts: imx7-tqma7: remove superfluous status property SDMA is enabled by default, so remove the status property. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 4 ---- 1 file changed, 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 95c0f3139441..f774d74ea20f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -266,10 +266,6 @@ }; }; -&sdma { - status = "okay"; -}; - &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; -- cgit v1.2.3 From c3daa6513e2ea2a4daa82f5fc886c1f0d44833a6 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:54 +0100 Subject: ARM: dts: imx7-tqma7: mark system data eeprom as read-only This is manufacturer data and shall not be modified. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index f774d74ea20f..cc02b795b495 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -146,6 +146,7 @@ /* ST M24C64 */ m24c64: eeprom@50 { compatible = "atmel,24c64"; + read-only; reg = <0x50>; pagesize = <32>; status = "okay"; -- cgit v1.2.3 From 5ec4722f4939d0766706286c7d8e0e4f31d1d3a4 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:55 +0100 Subject: ARM: dts: imx7-tqma7: rename node for SE97BTP temperature-sensor is the recommended node name and its main purpose. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index cc02b795b495..14fd9455c162 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -138,7 +138,7 @@ }; /* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */ - se97b: temperature-sensor-eeprom@1e { + se97b: temperature-sensor@1e { compatible = "nxp,se97b", "jedec,jc-42.4-temp"; reg = <0x1e>; }; -- cgit v1.2.3 From b669a87ed367a9d02ba928a2ed82e49fd139c2c0 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:56 +0100 Subject: ARM: dts: imx7d-mba7: Remove USB OTG related properties on USB node These properties are only used on USB OTG/DR devices, remove them from a host only device. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts index 8f2f3898d9d1..0443faa3dfae 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-mba7.dts @@ -129,9 +129,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg2>; vbus-supply = <®_usb_otg2_vbus>; - srp-disable; - hnp-disable; - adp-disable; disable-over-current; dr_mode = "host"; status = "okay"; -- cgit v1.2.3 From cf22d879694046d26f2b45fdadd48ede14c739cb Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:57 +0100 Subject: ARM: dts: imx7-tqma7: Add missing vcc supply to i2c eeproms Fixes the warnings: at24 0-0050: supply vcc not found, using dummy regulator at24 0-0056: supply vcc not found, using dummy regulator Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 14fd9455c162..0cf0304a8db6 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -149,6 +149,7 @@ read-only; reg = <0x50>; pagesize = <32>; + vcc-supply = <&vgen4_reg>; status = "okay"; }; @@ -156,6 +157,7 @@ compatible = "nxp,se97b", "atmel,24c02"; reg = <0x56>; pagesize = <16>; + vcc-supply = <&vgen4_reg>; status = "okay"; }; -- cgit v1.2.3 From 4afd99042571ab5a328834c8a6c7adfae1421b53 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:58 +0100 Subject: ARM: dts: imx7-mba7: Add missing vcc supply to i2c devices Fixes the warnings: pca953x 1-0020: supply vcc not found, using dummy regulator lm75 0-0049: supply vs not found, using dummy regulator Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi index 1b1eac33a70f..1235a71c6abe 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-mba7.dtsi @@ -182,6 +182,14 @@ regulator-always-on; }; + reg_vcc_3v3: regulator-vcc-3v3 { + compatible = "regulator-fixed"; + regulator-name = "VCC3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + sound { compatible = "fsl,imx-audio-tlv320aic32x4"; model = "imx-audio-tlv320aic32x4"; @@ -304,6 +312,7 @@ lm75: temperature-sensor@49 { compatible = "national,lm75"; reg = <0x49>; + vs-supply = <®_vcc_3v3>; }; }; @@ -336,6 +345,7 @@ interrupts = <12 IRQ_TYPE_EDGE_FALLING>; interrupt-controller; #interrupt-cells = <2>; + vcc-supply = <®_vcc_3v3>; }; }; -- cgit v1.2.3 From 1263f35e5ea2e4230f6bd41db8ead1cfa3763b00 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Mon, 18 Dec 2023 13:54:59 +0100 Subject: ARM: dts: imx7-tqma7: Fix PMIC v33 rail voltage range regulator-*-microvolt is not the range the regulator supports, but the range which the regulator is allowed to configure. Limit v33 rail to 3.3V only. Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi index 0cf0304a8db6..028961eb7108 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx7-tqma7.dtsi @@ -112,7 +112,7 @@ }; vgen4_reg: v33 { - regulator-min-microvolt = <2850000>; + regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; -- cgit v1.2.3 From 38c0483d08aa905852b3fd7d62334223daf90079 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Thu, 21 Dec 2023 17:46:33 +0100 Subject: ARM: dts: imx6ull-dhcor: Remove 900MHz operating point Due to CPU lifetime consideration of the SoC manufacturer [1] and the preferred area of operation in the industrial related environment, set the maximum frequency for each DHCOM i.MX6ULL to 792MHz, as with the industrial type. This is done by removing the operating point at 900MHz and set the clock-frequency to 792000000. [1] https://www.nxp.com/docs/en/application-note/AN5337.pdf Signed-off-by: Christoph Niedermaier Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi index 45315adfaa86..75486e1b0c15 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcor-som.dtsi @@ -28,10 +28,14 @@ /* * Due to the design as a solderable SOM, there are no capacitors * below the SoC, therefore higher voltages are required. + * Due to CPU lifetime consideration of the SoC manufacturer and + * the preferred area of operation in the industrial related + * environment, set the maximum frequency for each DHCOM i.MX6ULL + * to 792MHz, as with the industrial type. */ + clock-frequency = <792000000>; operating-points = < /* kHz uV */ - 900000 1275000 792000 1250000 /* Voltage increased */ 528000 1175000 396000 1025000 @@ -39,7 +43,6 @@ >; fsl,soc-operating-points = < /* KHz uV */ - 900000 1250000 792000 1250000 /* Voltage increased */ 528000 1175000 396000 1175000 -- cgit v1.2.3 From a2921599ecfae1bd627d0f2692dd3e26a3182863 Mon Sep 17 00:00:00 2001 From: Andreas Kemnade Date: Sat, 23 Dec 2023 23:12:13 +0100 Subject: ARM: dts: imx6sl-tolino-shine2hd: fix touchscreen rotation The display is in landscape orientation, but the touchscreen is in portrait orientation. Specify that properly in the devicetree. Signed-off-by: Andreas Kemnade Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts index 815119c12bd4..5636fb3661e8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6sl-tolino-shine2hd.dts @@ -141,8 +141,10 @@ interrupts = <6 IRQ_TYPE_EDGE_FALLING>; vdd-supply = <&ldo1_reg>; reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; - x-size = <1072>; - y-size = <1448>; + touchscreen-size-x = <1072>; + touchscreen-size-y = <1448>; + touchscreen-swapped-x-y; + touchscreen-inverted-x; }; /* TODO: TPS65185 PMIC for E Ink at 0x68 */ -- cgit v1.2.3 From e2eae2e329ff5fd27d59bad3252c1fa9d0c47677 Mon Sep 17 00:00:00 2001 From: Alexander Stein Date: Wed, 10 Jan 2024 09:10:59 +0100 Subject: ARM: dts: imx6ul: Add missing #thermal-sensor-cells to tempmon Fixes the dtbs_check warning: tempmon: '#thermal-sensor-cells' is a required property Signed-off-by: Alexander Stein Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index a27a7554c2e7..c7ae70818375 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -638,6 +638,7 @@ nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>; nvmem-cell-names = "calib", "temp_grade"; clocks = <&clks IMX6UL_CLK_PLL3_USB_OTG>; + #thermal-sensor-cells = <0>; }; }; -- cgit v1.2.3 From 8458002b765c2768490bde9cb8f7665d2ffcf102 Mon Sep 17 00:00:00 2001 From: Frieder Schrempf Date: Tue, 16 Jan 2024 19:10:28 +0100 Subject: ARM: dts: imx6dl: Add support for Sielaff i.MX6 Solo board The Sielaff i.MX6 Solo board is used as controller and user interface in vending machines. It is based on the i.MX6 Solo SoC and features the following peripherals and interfaces: * 512 MB DDR3 RAM * 512 MB NAND Flash * 1 MB NOR Flash * SD card * Debug LED * Debug UART * Key Inputs * RTC * RS232 * 100 MBit Ethernet * USB Hub * USB OTG * HDMI * 7" LVDS IPS panel * PWM Backlight * Optional Extension Board with USB Ethernet NIC Signed-off-by: Frieder Schrempf Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + arch/arm/boot/dts/nxp/imx/imx6dl-sielaff.dts | 533 +++++++++++++++++++++++++++ 2 files changed, 534 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6dl-sielaff.dts (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index a724d1a7a9a0..c32e004e7610 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -118,6 +118,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-sabrelite.dtb \ imx6dl-sabresd.dtb \ imx6dl-savageboard.dtb \ + imx6dl-sielaff.dtb \ imx6dl-skov-revc-lt2.dtb \ imx6dl-skov-revc-lt6.dtb \ imx6dl-solidsense.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-sielaff.dts b/arch/arm/boot/dts/nxp/imx/imx6dl-sielaff.dts new file mode 100644 index 000000000000..7de8d5f26518 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-sielaff.dts @@ -0,0 +1,533 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2022 Kontron Electronics GmbH + */ + +/dts-v1/; + +#include "imx6dl.dtsi" +#include +#include +#include + +/ { + model = "Sielaff i.MX6 Solo"; + compatible = "sielaff,imx6dl-board", "fsl,imx6dl"; + + chosen { + stdout-path = &uart2; + }; + + backlight: pwm-backlight { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_backlight>; + pwms = <&pwm3 0 50000 0>; + brightness-levels = <0 0 64 88 112 136 184 232 255>; + default-brightness-level = <4>; + enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; + power-supply = <®_backlight>; + }; + + cec { + compatible = "cec-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hdmi_cec>; + cec-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>; + hdmi-phandle = <&hdmi>; + }; + + enet_ref: clock-enet-ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "enet-ref"; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_keys>; + + key-0 { + gpios = <&gpio2 16 0>; + debounce-interval = <10>; + linux,code = <1>; + }; + + key-1 { + gpios = <&gpio3 27 0>; + debounce-interval = <10>; + linux,code = <2>; + }; + + key-2 { + gpios = <&gpio5 4 0>; + debounce-interval = <10>; + linux,code = <3>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio_leds>; + + led-debug { + label = "debug-led"; + gpios = <&gpio5 21 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + }; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + device_type = "memory"; + }; + + osc_eth_phy: clock-osc-eth-phy { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "osc-eth-phy"; + }; + + panel { + compatible = "lg,lb070wv8"; + backlight = <&backlight>; + power-supply = <®_3v3>; + + port { + panel_in_lvds: endpoint { + remote-endpoint = <&lvds_out>; + }; + }; + }; + + reg_3v3: regulator-3v3 { + compatible = "regulator-fixed"; + regulator-name = "3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_backlight: regulator-backlight { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_backlight>; + enable-active-high; + gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>; + regulator-name = "backlight"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + reg_usb_otg_vbus: regulator-usb-otg-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usbotg_vbus>; + enable-active-high; + gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>; + regulator-name = "usb_otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&ecspi2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <20000000>; + }; +}; + +&fec { + /* + * Set PTP clock to external instead of internal reference, as the + * REF_CLK from the PHY is fed back into the i.MX6 and the GPR + * register needs to be set accordingly (see mach-imx6q.c). + */ + clocks = <&clks IMX6QDL_CLK_ENET>, + <&clks IMX6QDL_CLK_ENET>, + <&enet_ref>, + <&clks IMX6QDL_CLK_ENET_REF>; + clock-names = "ipg", "ahb", "ptp", "enet_out"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-connection-type = "rmii"; + phy-handle = <ðphy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy: ethernet-phy@1 { + reg = <1>; + clocks = <&osc_eth_phy>; + clock-names = "rmii-ref"; + micrel,led-mode = <1>; + reset-assert-us = <500>; + reset-deassert-us = <100>; + reset-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gpio1 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "key-out", "key-in", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpio2 { + gpio-line-names = + "", "", "", "", "", "", "", "", + "lan9500a-rst", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", "", + "", "", "", "", "", "", "", ""; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c4>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <100000>; + status = "okay"; + + rtc@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <100000>; + status = "okay"; + + touchscreen@55 { + compatible = "sitronix,st1633"; + reg = <0x55>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_touch>; + interrupts = <18 IRQ_TYPE_EDGE_FALLING>; + interrupt-parent = <&gpio5>; + gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; + status = "disabled"; + }; + + touchscreen@5d { + compatible = "goodix,gt928"; + reg = <0x5d>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_touch>; + interrupts = <18 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio5>; + irq-gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clock-frequency = <100000>; + status = "okay"; +}; + +&ldb { + status = "okay"; + + lvds: lvds-channel@0 { + fsl,data-mapping = "spwg"; + fsl,data-width = <24>; + status = "okay"; + + port@4 { + reg = <4>; + + lvds_out: endpoint { + remote-endpoint = <&panel_in_lvds>; + }; + }; + }; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "okay"; +}; + +&usbh1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh1>; + disable-over-current; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + usb1@1 { + compatible = "usb4b4,6570"; + reg = <1>; + clocks = <&clks IMX6QDL_CLK_CKO>; + + assigned-clocks = <&clks IMX6QDL_CLK_CKO>, + <&clks IMX6QDL_CLK_CKO2_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_CKO2>, + <&clks IMX6QDL_CLK_OSC>; + assigned-clock-rates = <12000000 0>; + }; +}; + +&usbotg { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg>; + dr_mode = "host"; + over-current-active-low; + vbus-supply = <®_usb_otg_vbus>; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3v3>; + voltage-ranges = <3300 3300>; + no-1-8-v; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + pinctrl_hog: hoggrp { + fsl,pins = < + MX6QDL_PAD_RGMII_RD0__GPIO6_IO25 0x1b0b0 /* PMIC_IRQ */ + MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 + MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 + MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x1b0b0 + MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0 + MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x1b0b0 + >; + }; + + pinctrl_backlight: backlightgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x100b1 + >; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1 + MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1 + MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1 + MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1 + >; + }; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b1 + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x1b080 + MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x1b080 + MX6QDL_PAD_EIM_A24__GPIO5_IO04 0x1b080 + >; + }; + + pinctrl_gpio_leds: gpioledsgrp { + fsl,pins = < + MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpminandgrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + >; + }; + + pinctrl_hdmi_cec: hdmicecgrp { + fsl,pins = < + MX6QDL_PAD_EIM_A21__GPIO2_IO17 0x1b8b1 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001f8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001f8b1 + >; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 + >; + }; + + pinctrl_reg_backlight: regbacklightgrp { + fsl,pins = < + MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b1 + >; + }; + + pinctrl_reg_usbotg_vbus: regusbotgvbusgrp { + fsl,pins = < + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b1 + >; + }; + + pinctrl_touch: touchgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 + MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x1b0b0 + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b0 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b0 + >; + }; + + pinctrl_usbh1: usbh1grp { + fsl,pins = < + MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b1 + MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x1b0b0 + >; + }; + + pinctrl_usbotg: usbotggrp { + fsl,pins = < + MX6QDL_PAD_KEY_COL4__USB_OTG_OC 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x100b1 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6QDL_PAD_GPIO_9__WDOG1_B 0x1b0b0 + >; + }; +}; -- cgit v1.2.3 From 2a33952350712fe93e97eaa59184e62246f85e4f Mon Sep 17 00:00:00 2001 From: Josua Mayer Date: Thu, 18 Jan 2024 16:01:10 +0100 Subject: ARM: dts: imx6qdl-hummingboard: Add rtc0 and rtc1 aliases to fix hctosys HummingBoard has two RTCs, first integrated within SoC that can be used to wake up from sleep - and a second on the carrier board including back-up battery which is intended for keeping time during power-off. Add aliases for both, ensuring that the battery-backed clock is primary rtc and used by default during boot for restoring system time. Fixes keeping time across power-cycle observed on Debian, which sets RTC_HCTOSYS_DEVICE="rtc0". Signed-off-by: Josua Mayer Reviewed-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi | 7 ++++++- arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi | 5 +++++ 2 files changed, 11 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi index bfade7149080..a955c77cd499 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard.dtsi @@ -41,6 +41,11 @@ #include / { + aliases { + rtc0 = &carrier_rtc; + rtc1 = &snvs_rtc; + }; + /* Will be filled by the bootloader */ memory@10000000 { device_type = "memory"; @@ -187,7 +192,7 @@ status = "okay"; /* Pro baseboard model */ - rtc@68 { + carrier_rtc: rtc@68 { compatible = "nxp,pcf8523"; reg = <0x68>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi index 0883ef99cded..e6017f9bf640 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-hummingboard2.dtsi @@ -41,6 +41,11 @@ #include / { + aliases { + rtc0 = &pcf8523; + rtc1 = &snvs_rtc; + }; + /* Will be filled by the bootloader */ memory@10000000 { device_type = "memory"; -- cgit v1.2.3 From 532d8fe50367891f83e50fc5fd9ff361d30cc252 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Wed, 24 Jan 2024 13:44:55 +0100 Subject: ARM: dts: imx6: skov: add aliases for all ethernet nodes Add aliases for all ethernet nodes including the switch. It makes it easier to find this nodes by the boot loader. Signed-off-by: Oleksij Rempel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi index 2731faede1cb..d59d5d0e1d19 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-cpu.dtsi @@ -13,10 +13,14 @@ aliases { can0 = &can1; can1 = &can2; + ethernet0 = &fec; + ethernet1 = &lan1; + ethernet2 = &lan2; mdio-gpio0 = &mdio; nand = &gpmi; rtc0 = &i2c_rtc; rtc1 = &snvs; + switch0 = &switch; usb0 = &usbh1; usb1 = &usbotg; }; @@ -60,7 +64,7 @@ gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>, <&gpio1 22 GPIO_ACTIVE_HIGH>; - switch@0 { + switch: switch@0 { compatible = "microchip,ksz8873"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; @@ -73,13 +77,13 @@ #address-cells = <1>; #size-cells = <0>; - ports@0 { + lan1: ports@0 { reg = <0>; phy-mode = "internal"; label = "lan1"; }; - ports@1 { + lan2: ports@1 { reg = <1>; phy-mode = "internal"; label = "lan2"; -- cgit v1.2.3 From 5ec35a64c8cbfc2775adf2dc097a359bc1f5c9f3 Mon Sep 17 00:00:00 2001 From: Hiago De Franco Date: Wed, 24 Jan 2024 11:13:20 -0300 Subject: ARM: dts: imx: Add support for Apalis Evaluation Board v1.2 Add support for the new Apalis Evaluation Board v1.2. Because only the imx6q-apalis-eval.dts was available, the imx6q-apalis-eval.dtsi has been created which has common hardware configurations for v1.0, v1.1 and v1.2. Both imx6q-apalis-eval.dts and imx6q-apalis-eval-v1.2.dts files include imx6q-apalis-eval.dtsi. Versions 1.0 and 1.1 are compatible with each other and should use imx6q-apalis-eval.dts file. Now for v1.2, the new device-tree file should be used. Reviewed-by: Francesco Dolcini Signed-off-by: Hiago De Franco Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/Makefile | 1 + .../boot/dts/nxp/imx/imx6q-apalis-eval-v1.2.dts | 200 +++++++++++++++++++++ arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts | 108 +---------- arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi | 120 +++++++++++++ 4 files changed, 323 insertions(+), 106 deletions(-) create mode 100644 arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval-v1.2.dts create mode 100644 arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index c32e004e7610..87dbd842f663 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -148,6 +148,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-yapp4-phoenix.dtb \ imx6dl-yapp4-ursa.dtb \ imx6q-apalis-eval.dtb \ + imx6q-apalis-eval-v1.2.dtb \ imx6q-apalis-ixora.dtb \ imx6q-apalis-ixora-v1.1.dtb \ imx6q-apalis-ixora-v1.2.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval-v1.2.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval-v1.2.dts new file mode 100644 index 000000000000..15d4a98ee976 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval-v1.2.dts @@ -0,0 +1,200 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2024 Toradex + */ + +/dts-v1/; + +#include "imx6q-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board v1.2"; + compatible = "toradex,apalis_imx6q-eval-v1.2", "toradex,apalis_imx6q", + "fsl,imx6q"; + + reg_3v3_mmc: regulator-3v3-mmc { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_mmc>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V_MMC"; + startup-delay-us = <10000>; + }; + + reg_3v3_sd: regulator-3v3-sd { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>; + off-on-delay-us = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_3v3_sd>; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V_SD"; + startup-delay-us = <10000>; + }; + + reg_can1: regulator-can1 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can1_power>; + regulator-name = "5V_SW_CAN1"; + startup-delay-us = <10000>; + }; + + reg_can2: regulator-can2 { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enable_can2_power>; + regulator-name = "5V_SW_CAN2"; + startup-delay-us = <10000>; + }; + + sound-carrier { + compatible = "simple-audio-card"; + simple-audio-card,bitclock-master = <&codec_dai>; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&codec_dai>; + simple-audio-card,name = "apalis-nau8822"; + simple-audio-card,routing = + "Headphones", "LHP", + "Headphones", "RHP", + "Speaker", "LSPK", + "Speaker", "RSPK", + "Line Out", "AUXOUT1", + "Line Out", "AUXOUT2", + "LAUX", "Line In", + "RAUX", "Line In", + "LMICP", "Mic In", + "RMICP", "Mic In"; + simple-audio-card,widgets = + "Headphones", "Headphones", + "Line Out", "Line Out", + "Speaker", "Speaker", + "Microphone", "Mic In", + "Line", "Line In"; + + codec_dai: simple-audio-card,codec { + sound-dai = <&nau8822_1a>; + system-clock-frequency = <12288000>; + }; + + simple-audio-card,cpu { + sound-dai = <&ssi2>; + }; + }; +}; + +&can1 { + xceiver-supply = <®_can1>; + status = "okay"; +}; + +&can2 { + xceiver-supply = <®_can2>; + status = "okay"; +}; + +/* I2C1_SDA/SCL on MXM3 209/211 */ +&i2c1 { + /* Audio Codec */ + nau8822_1a: audio-codec@1a { + compatible = "nuvoton,nau8822"; + reg = <0x1a>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_nau8822>; + #sound-dai-cells = <0>; + }; + + /* Current measurement into module VCC */ + hwmon@40 { + compatible = "ti,ina219"; + reg = <0x40>; + shunt-resistor = <5000>; + }; + + /* Temperature Sensor */ + temperature-sensor@4f { + compatible = "ti,tmp75c"; + reg = <0x4f>; + }; + + /* EEPROM */ + eeprom@57 { + compatible = "st,24c02", "atmel,24c02"; + reg = <0x57>; + pagesize = <16>; + size = <256>; + }; +}; + +&pcie { + status = "okay"; +}; + +&ssi2 { + status = "okay"; +}; + +/* MMC1 */ +&usdhc1 { + bus-width = <4>; + pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; + vmmc-supply = <®_3v3_mmc>; + status = "okay"; +}; + +/* SD1 */ +&usdhc2 { + cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>; + vmmc-supply = <®_3v3_sd>; + status = "okay"; +}; + +&iomuxc { + pinctrl_enable_3v3_mmc: enable3v3mmcgrp { + fsl,pins = < + /* MMC1_PWR_CTRL */ + MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 + >; + }; + + pinctrl_enable_3v3_sd: enable3v3sdgrp { + fsl,pins = < + /* SD1_PWR_CTRL */ + MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 + >; + }; + + pinctrl_enable_can1_power: enablecan1powergrp { + fsl,pins = < + /* CAN1_PWR_EN */ + MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 + >; + }; + + pinctrl_enable_can2_power: enablecan2powergrp { + fsl,pins = < + /* CAN2_PWR_EN */ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; + + pinctrl_nau8822: nau8822grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x130b0 + MX6QDL_PAD_DISP0_DAT17__AUD5_TXD 0x130b0 + MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x130b0 + MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x130b0 + >; + }; +}; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts index 3fc079dfd61e..e1077e2da5f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts @@ -7,29 +7,13 @@ /dts-v1/; -#include -#include -#include -#include "imx6q.dtsi" -#include "imx6qdl-apalis.dtsi" +#include "imx6q-apalis-eval.dtsi" / { model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board"; compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q", "fsl,imx6q"; - aliases { - i2c0 = &i2c1; - i2c1 = &i2c3; - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; - }; - - chosen { - stdout-path = "serial0:115200n8"; - }; - reg_pcie_switch: regulator-pcie-switch { compatible = "regulator-fixed"; enable-active-high; @@ -40,14 +24,6 @@ startup-delay-us = <100000>; status = "okay"; }; - - reg_3v3_sw: regulator-3v3-sw { - compatible = "regulator-fixed"; - regulator-always-on; - regulator-max-microvolt = <3300000>; - regulator-min-microvolt = <3300000>; - regulator-name = "3.3V_SW"; - }; }; &can1 { @@ -62,102 +38,22 @@ /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { - status = "okay"; - + /* PCIe Switch */ pcie-switch@58 { compatible = "plx,pex8605"; reg = <0x58>; }; - - /* M41T0M6 real time clock on carrier board */ - rtc_i2c: rtc@68 { - compatible = "st,m41t0"; - reg = <0x68>; - }; -}; - -/* - * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier - * board) - */ -&i2c3 { - status = "okay"; }; &pcie { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_reset_moci>; - /* active-high meaning opposite of regular PERST# active-low polarity */ - reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; - reset-gpio-active-high; vpcie-supply = <®_pcie_switch>; status = "okay"; }; -&pwm1 { - status = "okay"; -}; - -&pwm2 { - status = "okay"; -}; - -&pwm3 { - status = "okay"; -}; - -&pwm4 { - status = "okay"; -}; - -®_usb_host_vbus { - status = "okay"; -}; - -®_usb_otg_vbus { - status = "okay"; -}; - -&sata { - status = "okay"; -}; - &sound_spdif { status = "okay"; }; -&spdif { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&uart4 { - status = "okay"; -}; - -&uart5 { - status = "okay"; -}; - -&usbh1 { - disable-over-current; - vbus-supply = <®_usb_host_vbus>; - status = "okay"; -}; - -&usbotg { - disable-over-current; - vbus-supply = <®_usb_otg_vbus>; - status = "okay"; -}; - /* MMC1 */ &usdhc1 { status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi new file mode 100644 index 000000000000..b6c45ad3f430 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dtsi @@ -0,0 +1,120 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright 2014-2024 Toradex + */ + +#include +#include +#include +#include "imx6q.dtsi" +#include "imx6qdl-apalis.dtsi" + +/ { + aliases { + i2c0 = &i2c1; + i2c1 = &i2c3; + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reg_3v3_sw: regulator-3v3-sw { + compatible = "regulator-fixed"; + regulator-always-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <3300000>; + regulator-name = "3.3V_SW"; + }; +}; + +&i2c1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + +/* + * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier + * board) + */ +&i2c3 { + status = "okay"; +}; + +&pcie { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reset_moci>; + /* active-high meaning opposite of regular PERST# active-low polarity */ + reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; + reset-gpio-active-high; +}; + +&pwm1 { + status = "okay"; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&pwm4 { + status = "okay"; +}; + +®_usb_host_vbus { + status = "okay"; +}; + +®_usb_otg_vbus { + status = "okay"; +}; + +&sata { + status = "okay"; +}; + +&spdif { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&uart4 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&usbh1 { + disable-over-current; + vbus-supply = <®_usb_host_vbus>; + status = "okay"; +}; + +&usbotg { + disable-over-current; + vbus-supply = <®_usb_otg_vbus>; + status = "okay"; +}; -- cgit v1.2.3 From e7f32d8f2e972b25a5a6865d57db611efb2ddf00 Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Thu, 25 Jan 2024 13:46:21 +0100 Subject: ARM: dts: imx6ull-dhcom: Remove /omit-if-no-ref/ from node usdhc1-pwrseq Remove /omit-if-no-ref/ from node usdhc1-pwrseq, because if the compile flag -@ (include symbols) is used the node will always be there. In this case, GPIO H is not released and therefore cannot be used. Therefore, remove this node manually from the corresponding devicetree file and don't rely on /omit-if-no-ref/. Signed-off-by: Christoph Niedermaier Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som-cfg-sdcard.dtsi | 4 +++- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 2 files changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som-cfg-sdcard.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som-cfg-sdcard.dtsi index 040421f9c970..5e39f8dc1351 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som-cfg-sdcard.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som-cfg-sdcard.dtsi @@ -14,10 +14,12 @@ */ /* - * To use usdhc1 as SD card, the WiFi node must be deleted. + * To use usdhc1 as SD card, the WiFi node must be deleted. The associated + * pwrseq node is also deleted in order to ensure that GPIO H is released. * BT is also not available, so remove BT from the UART node. */ /delete-node/ &brcmf; +/delete-node/ &usdhc1_pwrseq; /delete-node/ &bluetooth; / { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index 830b5a5064f2..f914fe3818c2 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -52,7 +52,7 @@ }; /* SoM with WiFi/BT: WiFi pin WL_REG_ON is connected to a DHCOM GPIO */ - /omit-if-no-ref/ usdhc1_pwrseq: usdhc1-pwrseq { + usdhc1_pwrseq: usdhc1-pwrseq { compatible = "mmc-pwrseq-simple"; reset-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; /* GPIO H */ }; -- cgit v1.2.3 From eeb403df953f1a30c3b2c0b41be0556c0eda6fc4 Mon Sep 17 00:00:00 2001 From: Dmitry Baryshkov Date: Tue, 6 Feb 2024 17:26:29 +0200 Subject: ARM: dts: imx53-qsb: add support for the HDMI expander Add support for the MCIMXHDMICARD expansion card attached to the iMX53 QSB / QSRB platforms. This enables HDMI output on those devices. Reviewed-by: Fabio Estevam Signed-off-by: Dmitry Baryshkov Tested-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/Makefile | 4 ++ arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso | 87 +++++++++++++++++++++++++++ 2 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/Makefile b/arch/arm/boot/dts/nxp/imx/Makefile index 87dbd842f663..4052cad859fa 100644 --- a/arch/arm/boot/dts/nxp/imx/Makefile +++ b/arch/arm/boot/dts/nxp/imx/Makefile @@ -45,7 +45,9 @@ dtb-$(CONFIG_SOC_IMX53) += \ imx53-mba53.dtb \ imx53-ppd.dtb \ imx53-qsb.dtb \ + imx53-qsb-hdmi.dtb \ imx53-qsrb.dtb \ + imx53-qsrb-hdmi.dtb \ imx53-sk-imx53.dtb \ imx53-sk-imx53-atm0700d4-lvds.dtb \ imx53-sk-imx53-atm0700d4-rgb.dtb \ @@ -54,6 +56,8 @@ dtb-$(CONFIG_SOC_IMX53) += \ imx53-tx53-x13x.dtb \ imx53-usbarmory.dtb \ imx53-voipac-bsb.dtb +imx53-qsb-hdmi-dtbs := imx53-qsb.dtb imx53-qsb-hdmi.dtbo +imx53-qsrb-hdmi-dtbs := imx53-qsrb.dtb imx53-qsb-hdmi.dtbo dtb-$(CONFIG_SOC_IMX6Q) += \ imx6dl-alti6p.dtb \ imx6dl-apf6dev.dtb \ diff --git a/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso b/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso new file mode 100644 index 000000000000..c84e9b052527 --- /dev/null +++ b/arch/arm/boot/dts/nxp/imx/imx53-qsb-hdmi.dtso @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * DT overlay for MCIMXHDMICARD as used with the iMX53 QSB or QSRB boards + */ + +#include +#include + +/dts-v1/; +/plugin/; + +&{/} { + /delete-node/ panel; + + hdmi: connector-hdmi { + compatible = "hdmi-connector"; + label = "hdmi"; + type = "a"; + + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&sii9022_out>; + }; + }; + }; + + reg_1p2v: regulator-1p2v { + compatible = "regulator-fixed"; + regulator-name = "1P2V"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + vin-supply = <®_3p2v>; + }; +}; + +&display0 { + status = "okay"; +}; + +&display0 { + port@1 { + display0_out: endpoint { + remote-endpoint = <&sii9022_in>; + }; + }; +}; + +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + sii9022: bridge-hdmi@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + interrupts-extended = <&gpio3 31 IRQ_TYPE_LEVEL_LOW>; + iovcc-supply = <®_3p2v>; + #sound-dai-cells = <0>; + sil,i2s-data-lanes = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + sii9022_in: endpoint { + remote-endpoint = <&display0_out>; + }; + }; + + port@1 { + reg = <1>; + + sii9022_out: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; +}; + +&tve { + status = "disabled"; +}; -- cgit v1.2.3 From e2ba87c745ca7e11793be57d9a397f01966efa5b Mon Sep 17 00:00:00 2001 From: Manuel Traut Date: Thu, 8 Feb 2024 13:19:59 +0100 Subject: ARM: dts: imx6ul: Set macaddress location in ocotp If a bootloader does not configure the MAC address, devices come up with a random MAC at the moment. ocotp provides registers for storing the mac-address. Configure those for i.MX6UL and i.MX6ULL allows net/core to retrieve it from there. Signed-off-by: Manuel Traut Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index c7ae70818375..db5b66b76846 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -538,6 +538,8 @@ fsl,num-rx-queues = <1>; fsl,stop-mode = <&gpr 0x10 4>; fsl,magic-packet; + nvmem-cells = <&fec2_mac_addr>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -898,6 +900,8 @@ fsl,num-rx-queues = <1>; fsl,stop-mode = <&gpr 0x10 3>; fsl,magic-packet; + nvmem-cells = <&fec1_mac_addr>; + nvmem-cell-names = "mac-address"; status = "disabled"; }; @@ -1005,6 +1009,14 @@ cpu_speed_grade: speed-grade@10 { reg = <0x10 4>; }; + + fec1_mac_addr: mac-addr@88 { + reg = <0x88 6>; + }; + + fec2_mac_addr: mac-addr@8e { + reg = <0x8e 6>; + }; }; csi: csi@21c4000 { -- cgit v1.2.3 From 023bd910d3ab735459f84b22bb99fb9e00bd9d76 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michal=20Vok=C3=A1=C4=8D?= Date: Wed, 14 Feb 2024 10:03:27 +0100 Subject: ARM: dts: imx6dl-yapp4: Fix typo in the QCA switch register address MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This change does not have any functional effect. The switch works just fine without this patch as it has full access to all the addresses on the bus. This is simply a clean-up to set the node name address and reg address to the same value. Fixes: 15b43e497ffd ("ARM: dts: imx6dl-yapp4: Use correct pseudo PHY address for the switch") Signed-off-by: Michal Vokáč Reviewed-by: Andrew Lunn Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi index 3be38a3c4bb1..d2b3e09eb7df 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi @@ -127,7 +127,7 @@ switch@10 { compatible = "qca,qca8334"; - reg = <10>; + reg = <0x10>; reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; switch_ports: ports { -- cgit v1.2.3 From 79978bff2e4b8e05ebdf5fc3ee6b794002393484 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michal=20Vok=C3=A1=C4=8D?= Date: Wed, 14 Feb 2024 10:03:28 +0100 Subject: ARM: dts: imx6dl-yapp4: Move the internal switch PHYs under the switch node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We identified that the PHYs actually do not work since commit 7da7b84fee58 ("ARM: dts: imx6dl-yapp4: Move phy reset into switch node") as a coincidence of several circumstances. The reset signal is kept asserted by a pull-down resistor on the board unless it is deasserted by GPIO from the SoC. This is to keep the switch dead until it is configured properly by the kernel and user space. Prior to the referenced commit the switch was reset by the FEC driver and the reset GPIO was actively deasserted. The mdio-bus was scanned and the attached switch and its PHYs were found and configured. With the referenced commit the switch is reset by the qca8k driver. Because of another bug in the qca8k driver, functionality of the reset pin depends on its pre-kernel configuration. See commit c44fc98f0a8f ("net: dsa: qca8k: fix illegal usage of GPIO") The problem did not appear until we removed support for the switch and configuration of its reset pin from the bootloader. To fix that, properly describe the internal mdio-bus configuration of the qca8334 switch. The PHYs are internal to the switch and sit on its internal mdio-bus. Fixes: 7da7b84fee58 ("ARM: dts: imx6dl-yapp4: Move phy reset into switch node") Signed-off-by: Michal Vokáč Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi | 23 ++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi index d2b3e09eb7df..c32ea040fecd 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-yapp4-common.dtsi @@ -117,14 +117,6 @@ #address-cells = <1>; #size-cells = <0>; - phy_port2: phy@1 { - reg = <1>; - }; - - phy_port3: phy@2 { - reg = <2>; - }; - switch@10 { compatible = "qca,qca8334"; reg = <0x10>; @@ -149,15 +141,30 @@ eth2: port@2 { reg = <2>; label = "eth2"; + phy-mode = "internal"; phy-handle = <&phy_port2>; }; eth1: port@3 { reg = <3>; label = "eth1"; + phy-mode = "internal"; phy-handle = <&phy_port3>; }; }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy_port2: ethernet-phy@1 { + reg = <1>; + }; + + phy_port3: ethernet-phy@2 { + reg = <2>; + }; + }; }; }; }; -- cgit v1.2.3 From b530c501f57623357b0d74fc4d5fb33d41b26a9d Mon Sep 17 00:00:00 2001 From: Li Yang Date: Wed, 21 Feb 2024 17:15:09 -0500 Subject: ARM: dts: ls1021a: Enable usb3-lpm-capable for usb3 node Enable USB3 HW LPM feature. Signed-off-by: Ran Wang Signed-off-by: Li Yang Signed-off-by: Frank Li Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/ls/ls1021a.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi index d471cc5efa94..0989c21c8ffc 100644 --- a/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi +++ b/arch/arm/boot/dts/nxp/ls/ls1021a.dtsi @@ -808,6 +808,7 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; }; -- cgit v1.2.3 From bca507e7cfe644486b10d138c3ff8b04df7b1fc0 Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 22 Feb 2024 11:01:27 -0300 Subject: ARM: dts: imx28-evk: Use 'eeprom' as the node name Per at24.yaml, the node name should be 'eeprom'. Change it accordingly to fix the following schema warning: imx28-evk.dtb: at24@51: $nodename:0: 'at24@51' does not match '^eeprom@[0-9a-f]{1,2}$' from schema $id: http://devicetree.org/schemas/eeprom/at24.yaml# Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/mxs/imx28-evk.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts b/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts index 9ebb7371e235..330d3aff6b6c 100644 --- a/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts +++ b/arch/arm/boot/dts/nxp/mxs/imx28-evk.dts @@ -198,7 +198,7 @@ clocks = <&saif0>; }; - at24@51 { + eeprom@51 { compatible = "atmel,24c32"; pagesize = <32>; reg = <0x51>; -- cgit v1.2.3 From 8aa96bbd704f9181c19752c9576a7d744d24616c Mon Sep 17 00:00:00 2001 From: Fabio Estevam Date: Thu, 22 Feb 2024 11:34:49 -0300 Subject: ARM: dts: imx1-apf9328: Fix Ethernet node name Per davicom,dm9000.yaml, the Ethernet node name should be 'ethernet'. Change it to fix the following schema warning: imx1-apf9328.dtb: eth@4,c00000: $nodename:0: 'eth@4,c00000' does not match '^ethernet(@.*)?$' from schema $id: http://devicetree.org/schemas/net/davicom,dm9000.yaml# Signed-off-by: Fabio Estevam Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts index e66eef87a7a4..058e9435524f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts +++ b/arch/arm/boot/dts/nxp/imx/imx1-apf9328.dts @@ -54,7 +54,7 @@ #size-cells = <1>; }; - eth: eth@4,c00000 { + eth: ethernet@4,c00000 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_eth>; compatible = "davicom,dm9000"; -- cgit v1.2.3 From d28b03073a8423a4d51c8233710e5db41bdc9bc1 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:40 +0100 Subject: ARM: dts: imx6ull: fix pinctrl node name pinctrl node name must be either pinctrl or pinmux. Reviewed-by: Linus Walleij Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ull.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi index 2bccd45e9fc2..8a1776067ecc 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull.dtsi @@ -75,7 +75,7 @@ clocks = <&clks IMX6UL_CLK_DUMMY>; }; - iomuxc_snvs: iomuxc-snvs@2290000 { + iomuxc_snvs: pinctrl@2290000 { compatible = "fsl,imx6ull-iomuxc-snvs"; reg = <0x02290000 0x4000>; }; -- cgit v1.2.3 From 44951591873cee79a74e174b7281e65b897a45e4 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:41 +0100 Subject: ARM: dts: imx6ul: Remove fsl,anatop from usbotg1 fsl,anatop should only be added to the usbphy nodes. Signed-off-by: Sebastian Reichel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index db5b66b76846..5164c80c8368 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -858,7 +858,6 @@ clocks = <&clks IMX6UL_CLK_USBOH3>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc 0>; - fsl,anatop = <&anatop>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; -- cgit v1.2.3 From 2b221662bfede602cd3218218dc4d3cdeb1a7588 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:43 +0100 Subject: ARM: dts: nxp: imx6ul: xnur-gpio -> xnur-gpios Replace all "xnur-gpio" with "xnur-gpios" in the i.MX6UL(L) Touchscreen node, since the -gpio suffix is deprecated. All known implementations of this binding can handle -gpio and -gpios since day 1, so this should be fully backwards compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi index 2ac40d69425b..f10f0525490b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-14x14-evk.dtsi @@ -321,7 +321,7 @@ &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xfff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts index 875ae699c5cb..2ca18f3dad0a 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-geam.dts @@ -203,7 +203,7 @@ &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; &sai2 { diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi index 18cac19aa9b0..af337f18a266 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6uldev.dtsi @@ -156,7 +156,7 @@ &tsc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tsc>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; measure-delay-time = <0xffff>; pre-charge-time = <0xffff>; status = "okay"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi index f914fe3818c2..a74f5273f9b3 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-dhcom-som.dtsi @@ -273,7 +273,7 @@ pinctrl-names = "default"; pre-charge-time = <0xfff>; touchscreen-average-samples = <32>; - xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; + xnur-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; }; /* DHCOM UART1 */ -- cgit v1.2.3 From c5823a807ea2f6ac644bfb4f2a22dc0a5c2d9883 Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:44 +0100 Subject: ARM: dts: nxp: imx6ul: fix touchscreen node name The canonical node name for touchscreens is "touchscreen", so update the i.MX6UL "tsc" node accordingly. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 5164c80c8368..68012151a826 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -370,7 +370,7 @@ }; }; - tsc: tsc@2040000 { + tsc: touchscreen@2040000 { compatible = "fsl,imx6ul-tsc"; reg = <0x02040000 0x4000>, <0x0219c000 0x4000>; interrupts = , -- cgit v1.2.3 From ccda9e5c365f6c4c3af5fda9c15cce3779cb2bbe Mon Sep 17 00:00:00 2001 From: Sebastian Reichel Date: Sat, 24 Feb 2024 22:29:45 +0100 Subject: ARM: dts: nxp: imx: fix weim node name DT node names should be generic, so replace "weim" node name with "memory-controller" in all i.MX SoC DT files. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/nxp/imx/imx1.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx27.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx31.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx35.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx51.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sl.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 2 +- arch/arm/boot/dts/nxp/imx/imx6ul.dtsi | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boot/dts/nxp/imx/imx1.dtsi b/arch/arm/boot/dts/nxp/imx/imx1.dtsi index 1ac10965fdfd..389ecb1ebf8f 100644 --- a/arch/arm/boot/dts/nxp/imx/imx1.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx1.dtsi @@ -251,7 +251,7 @@ }; }; - weim: weim@220000 { + weim: memory-controller@220000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx1-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx27.dtsi b/arch/arm/boot/dts/nxp/imx/imx27.dtsi index ec472695c71e..ec3ccc8f4095 100644 --- a/arch/arm/boot/dts/nxp/imx/imx27.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx27.dtsi @@ -568,7 +568,7 @@ status = "disabled"; }; - weim: weim@d8002000 { + weim: memory-controller@d8002000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx27-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx31.dtsi b/arch/arm/boot/dts/nxp/imx/imx31.dtsi index e1ae7c175f7d..00006c90d9a7 100644 --- a/arch/arm/boot/dts/nxp/imx/imx31.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx31.dtsi @@ -352,7 +352,7 @@ status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { compatible = "fsl,imx31-weim", "fsl,imx27-weim"; reg = <0xb8002000 0x1000>; clocks = <&clks 56>; diff --git a/arch/arm/boot/dts/nxp/imx/imx35.dtsi b/arch/arm/boot/dts/nxp/imx/imx35.dtsi index 2d20e5541acc..442dc15677b8 100644 --- a/arch/arm/boot/dts/nxp/imx/imx35.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx35.dtsi @@ -374,7 +374,7 @@ status = "disabled"; }; - weim: weim@b8002000 { + weim: memory-controller@b8002000 { #address-cells = <2>; #size-cells = <1>; clocks = <&clks 0>; diff --git a/arch/arm/boot/dts/nxp/imx/imx51.dtsi b/arch/arm/boot/dts/nxp/imx/imx51.dtsi index c96d6311dfa7..4efce49022e4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx51.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx51.dtsi @@ -578,7 +578,7 @@ reg = <0x83fd8000 0x1000>; }; - weim: weim@83fda000 { + weim: memory-controller@83fda000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx51-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi index 81142c523fa8..8431b8a994f4 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi @@ -1158,7 +1158,7 @@ status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi index 28111efb19a6..6aa61235e39e 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sl.dtsi @@ -949,7 +949,7 @@ clocks = <&clks IMX6SL_CLK_DUMMY>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; reg = <0x021b8000 0x4000>; diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi index df3a375f0a3e..0de359d62a47 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi @@ -1107,7 +1107,7 @@ status = "disabled"; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim"; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi index 68012151a826..235aa676618b 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ul.dtsi @@ -979,7 +979,7 @@ clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; - weim: weim@21b8000 { + weim: memory-controller@21b8000 { #address-cells = <2>; #size-cells = <1>; compatible = "fsl,imx6ul-weim", "fsl,imx6q-weim"; -- cgit v1.2.3