From 76ce51798cb16738a4a28a6662e7344aaf7ef769 Mon Sep 17 00:00:00 2001 From: Sergio Paracuellos Date: Sat, 17 Dec 2022 08:48:06 +0100 Subject: MIPS: ralink: mt7621: avoid to init common ralink reset controller Commit 38a8553b0a22 ("clk: ralink: make system controller node a reset provider") make system controller a reset provider for mt7621 ralink SoCs. Ralink init code also tries to start previous common reset controller which at the end tries to find device tree node 'ralink,rt2880-reset'. mt7621 device tree file is not using at all this node anymore. Hence avoid to init this common reset controller for mt7621 ralink SoCs to avoid 'Failed to find reset controller node' boot error trace error. Fixes: 64b2d6ffff86 ("staging: mt7621-dts: align resets with binding documentation") Signed-off-by: Sergio Paracuellos Signed-off-by: Thomas Bogendoerfer --- arch/mips/ralink/of.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/ralink/of.c b/arch/mips/ralink/of.c index ea8072acf8d9..01c132bc33d5 100644 --- a/arch/mips/ralink/of.c +++ b/arch/mips/ralink/of.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "common.h" @@ -81,7 +82,8 @@ static int __init plat_of_setup(void) __dt_register_buses(soc_info.compatible, "palmbus"); /* make sure that the reset controller is setup early */ - ralink_rst_init(); + if (ralink_soc != MT762X_SOC_MT7621AT) + ralink_rst_init(); return 0; } -- cgit v1.2.3 From 24b333a866a10d4be47b9968b9c05a3e9f326ff5 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 20 Dec 2022 11:09:46 -0800 Subject: MIPS: dts: bcm63268: Add missing properties to the TWD node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We currently have a DTC warning with the current DTS due to the lack of a suitable #address-cells and #size-cells property: DTC arch/mips/boot/dts/brcm/bcm63268-comtrend-vr-3032u.dtb arch/mips/boot/dts/brcm/bcm63268.dtsi:115.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/timer@0:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/mips/boot/dts/brcm/bcm63268.dtsi:120.5-22: Warning (reg_format): /ubus/timer-mfd@10000080/watchdog@1c:reg: property has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1) arch/mips/boot/dts/brcm/bcm63268.dtsi:111.4-35: Warning (ranges_format): /ubus/timer-mfd@10000080:ranges: "ranges" property has invalid length (12 bytes) (parent #address-cells == 1, child #address-cells == 2, #size-cells == 1) Fixes: d3db4b96ab7f ("mips: dts: bcm63268: add TWD block timer") Signed-off-by: Florian Fainelli Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Thomas Bogendoerfer --- arch/mips/boot/dts/brcm/bcm63268.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/boot/dts/brcm/bcm63268.dtsi b/arch/mips/boot/dts/brcm/bcm63268.dtsi index c663efce91cf..7b788757cb1e 100644 --- a/arch/mips/boot/dts/brcm/bcm63268.dtsi +++ b/arch/mips/boot/dts/brcm/bcm63268.dtsi @@ -109,6 +109,8 @@ compatible = "brcm,bcm7038-twd", "simple-mfd", "syscon"; reg = <0x10000080 0x30>; ranges = <0x0 0x10000080 0x30>; + #address-cells = <1>; + #size-cells = <1>; timer@0 { compatible = "brcm,bcm6345-timer"; -- cgit v1.2.3