From a6db3b92323a0005b8685864be74262729780d5e Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 24 Jun 2022 05:58:56 +0530 Subject: soc/tegra: Add comment over devm_pm_opp_set_clkname() Explain why special handling was required here, it isn't obvious at all. Tested-by: Dmitry Osipenko Signed-off-by: Viresh Kumar --- drivers/soc/tegra/common.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'drivers/soc') diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c index 32c346b72635..9f3fdeb1a11c 100644 --- a/drivers/soc/tegra/common.c +++ b/drivers/soc/tegra/common.c @@ -108,6 +108,13 @@ int devm_tegra_core_dev_init_opp_table(struct device *dev, u32 hw_version; int err; + /* + * For some devices we don't have any OPP table in the DT, and in order + * to use the same code path for all the devices, we create a dummy OPP + * table for them via this call. The dummy OPP table is only capable of + * doing clk_set_rate() on invocation of dev_pm_opp_set_rate() and + * doesn't provide any other functionality. + */ err = devm_pm_opp_set_clkname(dev, NULL); if (err) { dev_err(dev, "failed to set OPP clk: %d\n", err); -- cgit v1.2.3