From 7bffd97eb7ab8a67de718bdd626e9fad27ee61b9 Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Fri, 22 Mar 2019 15:16:53 +0200 Subject: thunderbolt: Add downstream PCIe port mappings for Alpine and Titan Ridge In order to keep PCIe hierarchies consistent across hotplugs, add hard-coded PCIe downstream port to Thunderbolt port for Alpine Ridge and Titan Ridge as well. Signed-off-by: Mika Westerberg --- drivers/thunderbolt/tb.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'drivers/thunderbolt/tb.h') diff --git a/drivers/thunderbolt/tb.h b/drivers/thunderbolt/tb.h index a6f1fa0d4771..3d7b2202d248 100644 --- a/drivers/thunderbolt/tb.h +++ b/drivers/thunderbolt/tb.h @@ -608,6 +608,31 @@ static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw) } } +static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw) +{ + switch (sw->config.device_id) { + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: + case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: + return true; + default: + return false; + } +} + +static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw) +{ + switch (sw->config.device_id) { + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: + case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: + return true; + default: + return false; + } +} + /** * tb_switch_is_icm() - Is the switch handled by ICM firmware * @sw: Switch to check -- cgit v1.2.3