From 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Sat, 16 Apr 2005 15:20:36 -0700 Subject: Linux-2.6.12-rc2 Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip! --- include/asm-arm/arch-shark/debug-macro.S | 31 +++++ include/asm-arm/arch-shark/dma.h | 18 +++ include/asm-arm/arch-shark/entry-macro.S | 35 ++++++ include/asm-arm/arch-shark/hardware.h | 57 +++++++++ include/asm-arm/arch-shark/io.h | 199 +++++++++++++++++++++++++++++++ include/asm-arm/arch-shark/irqs.h | 13 ++ include/asm-arm/arch-shark/memory.h | 42 +++++++ include/asm-arm/arch-shark/param.h | 5 + include/asm-arm/arch-shark/system.h | 28 +++++ include/asm-arm/arch-shark/timex.h | 7 ++ include/asm-arm/arch-shark/uncompress.h | 60 ++++++++++ include/asm-arm/arch-shark/vmalloc.h | 15 +++ 12 files changed, 510 insertions(+) create mode 100644 include/asm-arm/arch-shark/debug-macro.S create mode 100644 include/asm-arm/arch-shark/dma.h create mode 100644 include/asm-arm/arch-shark/entry-macro.S create mode 100644 include/asm-arm/arch-shark/hardware.h create mode 100644 include/asm-arm/arch-shark/io.h create mode 100644 include/asm-arm/arch-shark/irqs.h create mode 100644 include/asm-arm/arch-shark/memory.h create mode 100644 include/asm-arm/arch-shark/param.h create mode 100644 include/asm-arm/arch-shark/system.h create mode 100644 include/asm-arm/arch-shark/timex.h create mode 100644 include/asm-arm/arch-shark/uncompress.h create mode 100644 include/asm-arm/arch-shark/vmalloc.h (limited to 'include/asm-arm/arch-shark') diff --git a/include/asm-arm/arch-shark/debug-macro.S b/include/asm-arm/arch-shark/debug-macro.S new file mode 100644 index 000000000000..7cb37f78825e --- /dev/null +++ b/include/asm-arm/arch-shark/debug-macro.S @@ -0,0 +1,31 @@ +/* linux/include/asm-arm/arch-shark/debug-macro.S + * + * Debugging macro include header + * + * Copyright (C) 1994-1999 Russell King + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + + .macro addruart,rx + mov \rx, #0xe0000000 + orr \rx, \rx, #0x000003f8 + .endm + + .macro senduart,rd,rx + strb \rd, [\rx] + .endm + + .macro busyuart,rd,rx + mov \rd, #0 +1001: add \rd, \rd, #1 + teq \rd, #0x10000 + bne 1001b + .endm + + .macro waituart,rd,rx + .endm diff --git a/include/asm-arm/arch-shark/dma.h b/include/asm-arm/arch-shark/dma.h new file mode 100644 index 000000000000..fc985d5e62af --- /dev/null +++ b/include/asm-arm/arch-shark/dma.h @@ -0,0 +1,18 @@ +/* + * linux/include/asm-arm/arch-shark/dma.h + * + * by Alexander Schulz + */ +#ifndef __ASM_ARCH_DMA_H +#define __ASM_ARCH_DMA_H + +/* Use only the lowest 4MB, nothing else works. + * The rest is not DMAable. See dev / .properties + * in OpenFirmware. + */ +#define MAX_DMA_ADDRESS 0xC0400000 +#define MAX_DMA_CHANNELS 8 +#define DMA_ISA_CASCADE 4 + +#endif /* _ASM_ARCH_DMA_H */ + diff --git a/include/asm-arm/arch-shark/entry-macro.S b/include/asm-arm/arch-shark/entry-macro.S new file mode 100644 index 000000000000..a924f27fb8d9 --- /dev/null +++ b/include/asm-arm/arch-shark/entry-macro.S @@ -0,0 +1,35 @@ +/* + * include/asm-arm/arch-shark/entry-macro.S + * + * Low-level IRQ helper macros for Shark platform + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + .macro disable_fiq + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + mov r4, #0xe0000000 + + mov \irqstat, #0x0C + strb \irqstat, [r4, #0x20] @outb(0x0C, 0x20) /* Poll command */ + ldrb \irqnr, [r4, #0x20] @irq = inb(0x20) & 7 + and \irqstat, \irqnr, #0x80 + teq \irqstat, #0 + beq 43f + and \irqnr, \irqnr, #7 + teq \irqnr, #2 + bne 44f +43: mov \irqstat, #0x0C + strb \irqstat, [r4, #0xa0] @outb(0x0C, 0xA0) /* Poll command */ + ldrb \irqnr, [r4, #0xa0] @irq = (inb(0xA0) & 7) + 8 + and \irqstat, \irqnr, #0x80 + teq \irqstat, #0 + beq 44f + and \irqnr, \irqnr, #7 + add \irqnr, \irqnr, #8 +44: teq \irqstat, #0 + .endm + diff --git a/include/asm-arm/arch-shark/hardware.h b/include/asm-arm/arch-shark/hardware.h new file mode 100644 index 000000000000..4d35f8c154c3 --- /dev/null +++ b/include/asm-arm/arch-shark/hardware.h @@ -0,0 +1,57 @@ +/* + * linux/include/asm-arm/arch-shark/hardware.h + * + * by Alexander Schulz + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/hardware.h + * Copyright (C) 1996-1999 Russell King. + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#ifndef __ASSEMBLY__ + +/* + * Mapping areas + */ +#define IO_BASE 0xe0000000 + +/* + * RAM definitions + */ +#define FLUSH_BASE_PHYS 0x80000000 + +#else + +#define IO_BASE 0 + +#endif + +#define IO_SIZE 0x08000000 +#define IO_START 0x40000000 +#define ROMCARD_SIZE 0x08000000 +#define ROMCARD_START 0x10000000 + +#define FLUSH_BASE 0xdf000000 +#define PCIO_BASE 0xe0000000 + + +/* defines for the Framebuffer */ +#define FB_START 0x06000000 +#define FB_SIZE 0x01000000 + +#define UNCACHEABLE_ADDR 0xdf010000 + +#define SEQUOIA_LED_GREEN (1<<6) +#define SEQUOIA_LED_AMBER (1<<5) +#define SEQUOIA_LED_BACK (1<<7) + +#define pcibios_assign_all_busses() 1 + +#define PCIBIOS_MIN_IO 0x6000 +#define PCIBIOS_MIN_MEM 0x50000000 +#define PCIMEM_BASE 0xe8000000 + +#endif + diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h new file mode 100644 index 000000000000..1e7f26bc2e1d --- /dev/null +++ b/include/asm-arm/arch-shark/io.h @@ -0,0 +1,199 @@ +/* + * linux/include/asm-arm/arch-shark/io.h + * + * by Alexander Schulz + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/io.h + * Copyright (C) 1997,1998 Russell King + */ + +#ifndef __ASM_ARM_ARCH_IO_H +#define __ASM_ARM_ARCH_IO_H + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * We use two different types of addressing - PC style addresses, and ARM + * addresses. PC style accesses the PC hardware with the normal PC IO + * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+ + * and are translated to the start of IO. + */ +#define __PORT_PCIO(x) (!((x) & 0x80000000)) + +/* + * Dynamic IO functions - let the compiler + * optimize the expressions + */ +#define DECLARE_DYN_OUT(fnsuffix,instr) \ +static inline void __out##fnsuffix (unsigned int value, unsigned int port) \ +{ \ + unsigned long temp; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "str" instr " %1, [%0, %2] @ out" #fnsuffix \ + : "=&r" (temp) \ + : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ +} + +#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ +static inline unsigned sz __in##fnsuffix (unsigned int port) \ +{ \ + unsigned long temp, value; \ + __asm__ __volatile__( \ + "tst %2, #0x80000000\n\t" \ + "mov %0, %4\n\t" \ + "addeq %0, %0, %3\n\t" \ + "ldr" instr " %1, [%0, %2] @ in" #fnsuffix \ + : "=&r" (temp), "=r" (value) \ + : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \ + : "cc"); \ + return (unsigned sz)value; \ +} + +static inline unsigned int __ioaddr (unsigned int port) \ +{ \ + if (__PORT_PCIO(port)) \ + return (unsigned int)(PCIO_BASE + (port)); \ + else \ + return (unsigned int)(IO_BASE + (port)); \ +} + +#define DECLARE_IO(sz,fnsuffix,instr) \ + DECLARE_DYN_OUT(fnsuffix,instr) \ + DECLARE_DYN_IN(sz,fnsuffix,instr) + +DECLARE_IO(char,b,"b") +DECLARE_IO(short,w,"h") +DECLARE_IO(long,l,"") + +#undef DECLARE_IO +#undef DECLARE_DYN_OUT +#undef DECLARE_DYN_IN + +/* + * Constant address IO functions + * + * These have to be macros for the 'J' constraint to work - + * +/-4096 immediate operand. + */ +#define __outbc(value,port) \ +({ \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "strb %0, [%1, %2] @ outbc" \ + : : "r" (value), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inbc(port) \ +({ \ + unsigned char result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldrb %0, [%1, %2] @ inbc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result; \ +}) + +#define __outwc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "strh %0, [%1, %2] @ outwc" \ + : : "r" (v|v<<16), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inwc(port) \ +({ \ + unsigned short result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldrh %0, [%1, %2] @ inwc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result & 0xffff; \ +}) + +#define __outlc(value,port) \ +({ \ + unsigned long v = value; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "str %0, [%1, %2] @ outlc" \ + : : "r" (v), "r" (IO_BASE), "r" (port)); \ +}) + +#define __inlc(port) \ +({ \ + unsigned long result; \ + if (__PORT_PCIO((port))) \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (PCIO_BASE), "Jr" (port)); \ + else \ + __asm__ __volatile__( \ + "ldr %0, [%1, %2] @ inlc" \ + : "=r" (result) : "r" (IO_BASE), "r" (port)); \ + result; \ +}) + +#define __ioaddrc(port) \ +({ \ + unsigned long addr; \ + if (__PORT_PCIO((port))) \ + addr = PCIO_BASE + (port); \ + else \ + addr = IO_BASE + (port); \ + addr; \ +}) + +#define __mem_pci(addr) (addr) + +#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) +#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) +#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) +#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) +#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) +#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) + +/* + * Translated address IO functions + * + * IO address has already been translated to a virtual address + */ +#define outb_t(v,p) \ + (*(volatile unsigned char *)(p) = (v)) + +#define inb_t(p) \ + (*(volatile unsigned char *)(p)) + +#define outl_t(v,p) \ + (*(volatile unsigned long *)(p) = (v)) + +#define inl_t(p) \ + (*(volatile unsigned long *)(p)) + +#endif diff --git a/include/asm-arm/arch-shark/irqs.h b/include/asm-arm/arch-shark/irqs.h new file mode 100644 index 000000000000..b36cc975b290 --- /dev/null +++ b/include/asm-arm/arch-shark/irqs.h @@ -0,0 +1,13 @@ +/* + * linux/include/asm-arm/arch-shark/irqs.h + * + * by Alexander Schulz + */ + +#define NR_IRQS 16 + +#define IRQ_ISA_KEYBOARD 1 +#define RTC_IRQ 8 +#define I8042_KBD_IRQ 1 +#define I8042_AUX_IRQ 12 +#define IRQ_HARDDISK 14 diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h new file mode 100644 index 000000000000..8ff956d25463 --- /dev/null +++ b/include/asm-arm/arch-shark/memory.h @@ -0,0 +1,42 @@ +/* + * linux/include/asm-arm/arch-shark/memory.h + * + * by Alexander Schulz + * + * derived from: + * linux/include/asm-arm/arch-ebsa110/memory.h + * Copyright (c) 1996-1999 Russell King. + */ +#ifndef __ASM_ARCH_MEMORY_H +#define __ASM_ARCH_MEMORY_H + +#include + +/* + * Physical DRAM offset. + */ +#define PHYS_OFFSET (0x08000000UL) + +#ifndef __ASSEMBLY__ + +static inline void __arch_adjust_zones(int node, unsigned long *zone_size, unsigned long *zhole_size) +{ + if (node != 0) return; + /* Only the first 4 MB (=1024 Pages) are usable for DMA */ + zone_size[1] = zone_size[0] - 1024; + zone_size[0] = 1024; + zhole_size[1] = zhole_size[0]; + zhole_size[0] = 0; +} + +#define arch_adjust_zones(node, size, holes) \ + __arch_adjust_zones(node, size, holes) + +#define ISA_DMA_THRESHOLD (PHYS_OFFSET + SZ_4M - 1) + +#endif + +#define __virt_to_bus(x) __virt_to_phys(x) +#define __bus_to_virt(x) __phys_to_virt(x) + +#endif diff --git a/include/asm-arm/arch-shark/param.h b/include/asm-arm/arch-shark/param.h new file mode 100644 index 000000000000..997eeb71de00 --- /dev/null +++ b/include/asm-arm/arch-shark/param.h @@ -0,0 +1,5 @@ +/* + * linux/include/asm-arm/arch-shark/param.h + * + * by Alexander Schulz + */ diff --git a/include/asm-arm/arch-shark/system.h b/include/asm-arm/arch-shark/system.h new file mode 100644 index 000000000000..f12d771ab4ce --- /dev/null +++ b/include/asm-arm/arch-shark/system.h @@ -0,0 +1,28 @@ +/* + * linux/include/asm-arm/arch-shark/system.h + * + * by Alexander Schulz + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +#include + +static void arch_reset(char mode) +{ + short temp; + local_irq_disable(); + /* Reset the Machine via pc[3] of the sequoia chipset */ + outw(0x09,0x24); + temp=inw(0x26); + temp = temp | (1<<3) | (1<<10); + outw(0x09,0x24); + outw(temp,0x26); + +} + +static inline void arch_idle(void) +{ +} + +#endif diff --git a/include/asm-arm/arch-shark/timex.h b/include/asm-arm/arch-shark/timex.h new file mode 100644 index 000000000000..0d02d255513b --- /dev/null +++ b/include/asm-arm/arch-shark/timex.h @@ -0,0 +1,7 @@ +/* + * linux/include/asm-arm/arch-shark/timex.h + * + * by Alexander Schulz + */ + +#define CLOCK_TICK_RATE 1193180 diff --git a/include/asm-arm/arch-shark/uncompress.h b/include/asm-arm/arch-shark/uncompress.h new file mode 100644 index 000000000000..910a8e0a0ca5 --- /dev/null +++ b/include/asm-arm/arch-shark/uncompress.h @@ -0,0 +1,60 @@ +/* + * linux/include/asm-arm/arch-shark/uncompress.h + * by Alexander Schulz + * + * derived from: + * linux/include/asm-arm/arch-ebsa285/uncompress.h + * Copyright (C) 1996,1997,1998 Russell King + */ + +#define SERIAL_BASE ((volatile unsigned char *)0x400003f8) + +static __inline__ void putc(char c) +{ + int t; + + SERIAL_BASE[0] = c; + t=0x10000; + while (t--); +} + +/* + * This does not append a newline + */ +static void putstr(const char *s) +{ + while (*s) { + putc(*s); + if (*s == '\n') + putc('\r'); + s++; + } +} + +#ifdef DEBUG +static void putn(unsigned long z) +{ + int i; + char x; + + putc('0'); + putc('x'); + for (i=0;i<8;i++) { + x='0'+((z>>((7-i)*4))&0xf); + if (x>'9') x=x-'0'+'A'-10; + putc(x); + } +} + +static void putr() +{ + putc('\n'); + putc('\r'); +} +#endif + +/* + * nothing to do + */ +#define arch_decomp_setup() +#define arch_decomp_wdog() diff --git a/include/asm-arm/arch-shark/vmalloc.h b/include/asm-arm/arch-shark/vmalloc.h new file mode 100644 index 000000000000..1cc20098f690 --- /dev/null +++ b/include/asm-arm/arch-shark/vmalloc.h @@ -0,0 +1,15 @@ +/* + * linux/include/asm-arm/arch-rpc/vmalloc.h + */ + +/* + * Just any arbitrary offset to the start of the vmalloc VM area: the + * current 8MB value just means that there will be a 8MB "hole" after the + * physical memory until the kernel virtual memory starts. That means that + * any out-of-bounds memory accesses will hopefully be caught. + * The vmalloc() routines leaves a hole of 4kB between each vmalloced + * area for the same reason. ;) + */ +#define VMALLOC_OFFSET (8*1024*1024) +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)) +#define VMALLOC_END (PAGE_OFFSET + 0x10000000) -- cgit v1.2.3