From b2c3e923110f6ca60ccb30cf4a6bda5211454c4f Mon Sep 17 00:00:00 2001 From: Guennadi Liakhovetski Date: Fri, 29 Jan 2010 15:31:06 +0100 Subject: ASoC: clean up wm8974 and wm8978 clock divider handling wm8974 and wm8978 codec drivers control DAC and ADC oversampling rates in their .set_clkdiv() methods, which is wrong, because these are simple boolean switches and not clock dividers. Move these bits to sound controls. Also remove manual configuration of the MCLK divider in wm8978, since it is configured automatically. Signed-off-by: Guennadi Liakhovetski Acked-by: Liam Girdwood Signed-off-by: Mark Brown --- sound/soc/sh/migor.c | 4 ---- 1 file changed, 4 deletions(-) (limited to 'sound/soc/sh/migor.c') diff --git a/sound/soc/sh/migor.c b/sound/soc/sh/migor.c index 3ccd9b393312..b823a5c9b9bc 100644 --- a/sound/soc/sh/migor.c +++ b/sound/soc/sh/migor.c @@ -59,10 +59,6 @@ static int migor_hw_params(struct snd_pcm_substream *substream, if (ret < 0) return ret; - ret = snd_soc_dai_set_clkdiv(codec_dai, WM8978_DACCLK, 8); - if (ret < 0) - return ret; - ret = snd_soc_dai_set_clkdiv(codec_dai, WM8978_OPCLKRATE, rate * 512); if (ret < 0) return ret; -- cgit v1.2.3