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authorGravatar Piyush Mehta <piyush.mehta@amd.com> 2023-07-21 09:41:18 +0530
committerGravatar Philipp Zabel <p.zabel@pengutronix.de> 2023-07-28 18:07:01 +0200
commit737af37e9c060f6e865090b885c1d6e3fe0f4d40 (patch)
treef000c891dc72ee5e252e0c56307ad9bddb0632be
parentreset: Explicitly include correct DT includes (diff)
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dt-bindings: reset: Updated binding for Versal-NET reset driver
Added dt-binding documentation for Versal NET platforms. Versal Net is a new AMD/Xilinx SoC. The SoC and its architecture is based on the Versal ACAP device. The Versal Net device includes more security features in the platform management controller (PMC) and increases the number of CPUs in the application processing unit (APU) and the real-time processing unit (RPU). Signed-off-by: Piyush Mehta <piyush.mehta@amd.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230721041119.4058430-2-piyush.mehta@amd.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r--Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
index 0d50f6a54af3..49db66801429 100644
--- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
+++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.yaml
@@ -32,6 +32,7 @@ properties:
enum:
- xlnx,zynqmp-reset
- xlnx,versal-reset
+ - xlnx,versal-net-reset
"#reset-cells":
const: 1