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| author |  Petr Machata <petrm@nvidia.com>
| 2023-11-20 19:25:28 +0100 |
|---|---|---|
| committer |  Jakub Kicinski <kuba@kernel.org>
| 2023-11-21 14:53:09 -0800 |
| commit | b51c876c2297f8b32ca579712e3ab1490114d1ee (patch) | |
| tree | 8fb565d8e1089d672ed2f732487f3202d8b8ecba | |
| parent | mlxsw: pci: Permit enabling CFF mode (diff) | |
| download | linux-b51c876c2297f8b32ca579712e3ab1490114d1ee.tar.gz linux-b51c876c2297f8b32ca579712e3ab1490114d1ee.tar.bz2 linux-b51c876c2297f8b32ca579712e3ab1490114d1ee.zip | |
mlxsw: spectrum_fid: Drop unnecessary conditions
The caller already only calls mlxsw_sp_fid_flood_tables_init() and
mlxsw_sp_fid_flood_tables_fini() if (fid_family->flood_tables). There
is no configuration where the pointer is non-NULL, but the number of
tables is zero. So drop the conditions.
Signed-off-by: Petr Machata <petrm@nvidia.com>
Reviewed-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Link: https://lore.kernel.org/r/897c6841bc756ac632b797bf67ac83c6a66ba359.1700503644.git.petrm@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c | 6 |
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c index 6a509913bdc7..d7fc579f3b29 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c @@ -1692,9 +1692,6 @@ mlxsw_sp_fid_flood_tables_init(struct mlxsw_sp_fid_family *fid_family) int err; int i; - if (!fid_family->nr_flood_tables) - return 0; - pgt_size = mlxsw_sp_fid_family_pgt_size(fid_family); err = mlxsw_sp_pgt_mid_alloc_range(mlxsw_sp, &fid_family->pgt_base, pgt_size); @@ -1723,9 +1720,6 @@ mlxsw_sp_fid_flood_tables_fini(struct mlxsw_sp_fid_family *fid_family) struct mlxsw_sp *mlxsw_sp = fid_family->mlxsw_sp; u16 pgt_size; - if (!fid_family->nr_flood_tables) - return; - pgt_size = mlxsw_sp_fid_family_pgt_size(fid_family); mlxsw_sp_pgt_mid_free_range(mlxsw_sp, fid_family->pgt_base, pgt_size); } |