diff options
| author |  Xu Yilun <yilun.xu@intel.com>
| 2020-09-15 11:44:21 +0800 |
|---|---|---|
| committer |  Lee Jones <lee.jones@linaro.org>
| 2020-09-30 17:46:21 +0100 |
| commit | 876611c493b10cbb59e0e2143d3e744d0442de63 (patch) | |
| tree | a8712c6580b880ab75077f9ca5cdab4a8083f721 /Documentation/ABI/testing | |
| parent | mfd: lp87565: Add LP87524-Q1 variant (diff) | |
| download | linux-876611c493b10cbb59e0e2143d3e744d0442de63.tar.gz linux-876611c493b10cbb59e0e2143d3e744d0442de63.tar.bz2 linux-876611c493b10cbb59e0e2143d3e744d0442de63.zip | |
mfd: intel-m10-bmc: Add Intel MAX 10 BMC chip support for Intel FPGA PAC
This patch implements the basic functions of the BMC chip for some Intel
FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the
Intel MAX 10 CPLD.
This BMC chip is connected to the FPGA by a SPI bus. To provide direct
register access from the FPGA, the "SPI slave to Avalon Master Bridge"
(spi-avmm) IP is integrated in the chip. It converts encoded streams of
bytes from the host to the internal register read/write on the Avalon
bus. So This driver uses the regmap-spi-avmm for register accessing.
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Russ Weight <russell.h.weight@intel.com>
Reviewed-by: Tom Rix <trix@redhat.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'Documentation/ABI/testing')
| -rw-r--r-- | Documentation/ABI/testing/sysfs-driver-intel-m10-bmc | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc new file mode 100644 index 000000000000..979a2d62513f --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc @@ -0,0 +1,15 @@ +What: /sys/bus/spi/devices/.../bmc_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun <yilun.xu@intel.com> +Description: Read only. Returns the hardware build version of Intel + MAX10 BMC chip. + Format: "0x%x". + +What: /sys/bus/spi/devices/.../bmcfw_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun <yilun.xu@intel.com> +Description: Read only. Returns the firmware version of Intel MAX10 + BMC chip. + Format: "0x%x". |