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| author |  Rob Herring <robh@kernel.org>
| 2022-11-04 11:24:29 -0500 |
|---|---|---|
| committer |  Viresh Kumar <viresh.kumar@linaro.org>
| 2022-11-07 11:19:10 +0530 |
| commit | cb140497fe4718f7393451b2f9309866722852a0 (patch) | |
| tree | ef750e35cbbbcea812ac7de394226b07668cbdde /Documentation/devicetree/bindings/cpufreq | |
| parent | cpufreq: qcom-hw: Move soc_data to struct qcom_cpufreq (diff) | |
| download | linux-cb140497fe4718f7393451b2f9309866722852a0.tar.gz linux-cb140497fe4718f7393451b2f9309866722852a0.tar.bz2 linux-cb140497fe4718f7393451b2f9309866722852a0.zip | |
dt-bindings: cpufreq: qcom: Add missing cache related properties
The examples' cache nodes are incomplete as 'cache-unified' and
'cache-level' are required cache properties.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/cpufreq')
| -rw-r--r-- | Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml index 24fa3d87a40b..e58c55f78aaa 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.yaml @@ -85,9 +85,13 @@ examples: qcom,freq-domain = <&cpufreq_hw 0>; L2_0: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; L3_0: l3-cache { compatible = "cache"; + cache-unified; + cache-level = <3>; }; }; }; @@ -101,6 +105,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 0>; L2_100: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -114,6 +120,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 0>; L2_200: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -127,6 +135,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 0>; L2_300: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -140,6 +150,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 1>; L2_400: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -153,6 +165,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 1>; L2_500: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -166,6 +180,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 1>; L2_600: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; @@ -179,6 +195,8 @@ examples: qcom,freq-domain = <&cpufreq_hw 1>; L2_700: l2-cache { compatible = "cache"; + cache-unified; + cache-level = <2>; next-level-cache = <&L3_0>; }; }; |