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author | 2022-06-03 14:24:44 -0700 | |
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committer | 2022-06-03 14:24:44 -0700 | |
commit | a01fe7ec42b7fcd4201084dc56a2372f7b101f99 (patch) | |
tree | 0b56f0b3e7f9e6f873e23d163c038c960a8fe444 /Documentation/devicetree/bindings/interconnect | |
parent | Merge tag 'arm-multiplatform-5.19-3' of git://git.kernel.org/pub/scm/linux/ke... (diff) | |
parent | dt-bindings: mtd: spi-nand: Add spi-peripheral-props.yaml reference (diff) | |
download | linux-a01fe7ec42b7fcd4201084dc56a2372f7b101f99.tar.gz linux-a01fe7ec42b7fcd4201084dc56a2372f7b101f99.tar.bz2 linux-a01fe7ec42b7fcd4201084dc56a2372f7b101f99.zip |
Merge tag 'devicetree-fixes-for-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree fixes from Rob Herring:
- Fixes for unevaluatedProperties warnings.
These were missed to due to a bug in dtschema which is now fixed. The
changes involve either adding missing properties or removing spurious
properties from examples.
- Update several Qualcomm binding maintainer email addresses
- Fix typo in imx8mp-media-blk-ctrl example
- Fix fixed string pattern in qcom,smd
- Correct the order of 'reg' entries in Xilinx PCI binding
* tag 'devicetree-fixes-for-5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
dt-bindings: mtd: spi-nand: Add spi-peripheral-props.yaml reference
dt-bindings: memory-controllers: ingenic: Split out child node properties
dt-bindings: net/dsa: Add spi-peripheral-props.yaml references
dt-bindings: PCI: apple: Add missing 'power-domains' property
dt-bindings: Update Sibi Sankar's email address
dt-bindings: clock: Update my email address
dt-bindings: PCI: xilinx-cpm: Fix reg property order
dt-bindings: net: Fix unevaluatedProperties warnings in examples
dt-bindings: PCI: socionext,uniphier-pcie: Add missing child interrupt controller
dt-bindings: usb: snps,dwc3: Add missing 'dma-coherent' property
dt-bindings: soc: imx8mp-media-blk-ctrl: Fix DT example
dt-bindings: soc: qcom,smd: do not use pattern for simple rpm-requests string
Diffstat (limited to 'Documentation/devicetree/bindings/interconnect')
-rw-r--r-- | Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 116e434d0daa..bf538c0c5a81 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider maintainers: - - Sibi Sankar <sibis@codeaurora.org> + - Sibi Sankar <quic_sibis@quicinc.com> description: L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM. |