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| author |  Tom Lendacky <thomas.lendacky@amd.com>
| 2024-03-22 10:41:06 -0500 |
|---|---|---|
| committer |  Ingo Molnar <mingo@kernel.org>
| 2024-03-24 05:00:35 +0100 |
| commit | 4d0d7e7852752ea56375ac8645f0239e21ca2b50 (patch) | |
| tree | 54ff84136257d188f166d705dfe5e90fc70d7374 /Documentation/devicetree/bindings | |
| parent | x86/cpu: Add model number for another Intel Arrow Lake mobile processor (diff) | |
| download | linux-4d0d7e7852752ea56375ac8645f0239e21ca2b50.tar.gz linux-4d0d7e7852752ea56375ac8645f0239e21ca2b50.tar.bz2 linux-4d0d7e7852752ea56375ac8645f0239e21ca2b50.zip | |
x86/boot/64: Apply encryption mask to 5-level pagetable update
When running with 5-level page tables, the kernel mapping PGD entry is
updated to point to the P4D table. The assignment uses _PAGE_TABLE_NOENC,
which, when SME is active (mem_encrypt=on), results in a page table
entry without the encryption mask set, causing the system to crash on
boot.
Change the assignment to use _PAGE_TABLE instead of _PAGE_TABLE_NOENC so
that the encryption mask is set for the PGD entry.
Fixes: 533568e06b15 ("x86/boot/64: Use RIP_REL_REF() to access early_top_pgt[]")
Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/8f20345cda7dbba2cf748b286e1bc00816fe649a.1711122067.git.thomas.lendacky@amd.com
Diffstat (limited to 'Documentation/devicetree/bindings')
0 files changed, 0 insertions, 0 deletions