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author | 2016-08-06 00:01:33 -0400 | |
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committer | 2016-08-06 00:01:33 -0400 | |
commit | a157b3aaa44829998d5a079174df989e5d8c20ff (patch) | |
tree | 35db2b0e47acebdc666fb58f185c84a219d78606 /Documentation/devicetree | |
parent | Merge tag 'ntb-4.8' of git://github.com/jonmason/ntb (diff) | |
parent | Merge branch 'for-4.8/regulator' into for-next (diff) | |
download | linux-a157b3aaa44829998d5a079174df989e5d8c20ff.tar.gz linux-a157b3aaa44829998d5a079174df989e5d8c20ff.tar.bz2 linux-a157b3aaa44829998d5a079174df989e5d8c20ff.zip |
Merge tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
"This set of changes improve some aspects of the atomic API as well as
make use of this new API in the regulator framework to allow properly
dealing with critical regulators controlled by a PWM.
Aside from that there's a bunch of updates and cleanups for existing
drivers, as well as the addition of new drivers for the Broadcom
iProc, STMPE and ChromeOS EC controllers"
* tag 'pwm/for-4.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (44 commits)
regulator: pwm: Document pwm-dutycycle-unit and pwm-dutycycle-range
regulator: pwm: Support extra continuous mode cases
pwm: Add ChromeOS EC PWM driver
dt-bindings: pwm: Add binding for ChromeOS EC PWM
mfd: cros_ec: Add EC_PWM function definitions
mfd: cros_ec: Add cros_ec_cmd_xfer_status() helper
pwm: atmel: Use of_device_get_match_data()
pwm: atmel: Fix checkpatch warnings
pwm: atmel: Fix disabling of PWM channels
dt-bindings: pwm: Add R-Car H3 device tree bindings
pwm: rcar: Use ARCH_RENESAS
pwm: tegra: Add support for Tegra186
dt-bindings: pwm: tegra: Add compatible string for Tegra186
pwm: tegra: Avoid overflow when calculating duty cycle
pwm: tegra: Allow 100 % duty cycle
pwm: tegra: Add support for reset control
pwm: tegra: Rename mmio_base to regs
pwm: tegra: Remove useless padding
pwm: tegra: Drop NUM_PWM macro
pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default value
...
Diffstat (limited to 'Documentation/devicetree')
6 files changed, 90 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt b/Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt new file mode 100644 index 000000000000..21f75bbd6dae --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/brcm,iproc-pwm.txt @@ -0,0 +1,21 @@ +Broadcom iProc PWM controller device tree bindings + +This controller has 4 channels. + +Required Properties : +- compatible: must be "brcm,iproc-pwm" +- reg: physical base address and length of the controller's registers +- clocks: phandle + clock specifier pair for the external clock +- #pwm-cells: Should be 3. See pwm.txt in this directory for a + description of the cells format. + +Refer to clocks/clock-bindings.txt for generic clock consumer properties. + +Example: + +pwm: pwm@18031000 { + compatible = "brcm,iproc-pwm"; + reg = <0x18031000 0x28>; + clocks = <&osc>; + #pwm-cells = <3>; +}; diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt new file mode 100644 index 000000000000..472bd46ab5a4 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.txt @@ -0,0 +1,23 @@ +* PWM controlled by ChromeOS EC + +Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller +(EC) and controlled via a host-command interface. + +An EC PWM node should be only found as a sub-node of the EC node (see +Documentation/devicetree/bindings/mfd/cros-ec.txt). + +Required properties: +- compatible: Must contain "google,cros-ec-pwm" +- #pwm-cells: Should be 1. The cell specifies the PWM index. + +Example: + cros-ec@0 { + compatible = "google,cros-ec-spi"; + + ... + + cros_ec_pwm: ec-pwm { + compatible = "google,cros-ec-pwm"; + #pwm-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt index c52f03b5032f..b4e73778dda3 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.txt @@ -1,10 +1,14 @@ Tegra SoC PWFM controller Required properties: -- compatible: For Tegra20, must contain "nvidia,tegra20-pwm". For Tegra30, - must contain "nvidia,tegra30-pwm". Otherwise, must contain - "nvidia,<chip>-pwm", plus one of the above, where <chip> is tegra114, - tegra124, tegra132, or tegra210. +- compatible: Must be: + - "nvidia,tegra20-pwm": for Tegra20 + - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30 + - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114 + - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124 + - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 + - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 + - "nvidia,tegra186-pwm": for Tegra186 - reg: physical base address and length of the controller's registers - #pwm-cells: should be 2. See pwm.txt in this directory for a description of the cells format. diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt index 0822a083fc57..d6de64335022 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.txt @@ -7,6 +7,7 @@ Required Properties: - "renesas,pwm-r8a7790": for R-Car H2 - "renesas,pwm-r8a7791": for R-Car M2-W - "renesas,pwm-r8a7794": for R-Car E2 + - "renesas,pwm-r8a7795": for R-Car H3 - reg: base address and length of the registers block for the PWM. - #pwm-cells: should be 2. See pwm.txt in this directory for a description of the cells format. diff --git a/Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt b/Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt new file mode 100644 index 000000000000..cb209646bf13 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/st,stmpe-pwm.txt @@ -0,0 +1,18 @@ +== ST STMPE PWM controller == + +This is a PWM block embedded in the ST Microelectronics STMPE +(ST Multi-Purpose Expander) chips. The PWM is registered as a +subdevices of the STMPE MFD device. + +Required properties: +- compatible: should be: + - "st,stmpe-pwm" +- #pwm-cells: should be 2. See pwm.txt in this directory for a description of + the cells format. + +Example: + +pwm0: pwm { + compatible = "st,stmpe-pwm"; + #pwm-cells = <2>; +}; diff --git a/Documentation/devicetree/bindings/regulator/pwm-regulator.txt b/Documentation/devicetree/bindings/regulator/pwm-regulator.txt index dd6f59cf1455..3aeba9f86ed8 100644 --- a/Documentation/devicetree/bindings/regulator/pwm-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/pwm-regulator.txt @@ -34,6 +34,18 @@ Only required for Voltage Table Mode: First cell is voltage in microvolts (uV) Second cell is duty-cycle in percent (%) +Optional properties for Continuous mode: +- pwm-dutycycle-unit: Integer value encoding the duty cycle unit. If not + defined, <100> is assumed, meaning that + pwm-dutycycle-range contains values expressed in + percent. + +- pwm-dutycycle-range: Should contain 2 entries. The first entry is encoding + the dutycycle for regulator-min-microvolt and the + second one the dutycycle for regulator-max-microvolt. + Duty cycle values are expressed in pwm-dutycycle-unit. + If not defined, <0 100> is assumed. + NB: To be clear, if voltage-table is provided, then the device will be used in Voltage Table Mode. If no voltage-table is provided, then the device will be used in Continuous Voltage Mode. @@ -53,6 +65,13 @@ Continuous Voltage With Enable GPIO Example: regulator-min-microvolt = <1016000>; regulator-max-microvolt = <1114000>; regulator-name = "vdd_logic"; + /* unit == per-mille */ + pwm-dutycycle-unit = <1000>; + /* + * Inverted PWM logic, and the duty cycle range is limited + * to 30%-70%. + */ + pwm-dutycycle-range <700 300>; /* */ }; Voltage Table Example: |