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| author |  Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| 2020-07-27 12:42:15 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| 2020-07-27 12:42:15 +0200 |
| commit | 908e757daecf2120c3019fa630ae5d4c3cd7165b (patch) | |
| tree | 652b0f3ecd4a6d7c0066169d6ae466711300197c /Documentation/driver-api | |
| parent | staging: comedi: addi: Replace HTTP links with HTTPS ones (diff) | |
| parent | Linux 5.8-rc7 (diff) | |
| download | linux-908e757daecf2120c3019fa630ae5d4c3cd7165b.tar.gz linux-908e757daecf2120c3019fa630ae5d4c3cd7165b.tar.bz2 linux-908e757daecf2120c3019fa630ae5d4c3cd7165b.zip | |
Merge 5.8-rc7 into staging-next
We need the staging fixes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/driver-api')
| -rw-r--r-- | Documentation/driver-api/ptp.rst | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/Documentation/driver-api/ptp.rst b/Documentation/driver-api/ptp.rst index a15192e32347..664838ae7776 100644 --- a/Documentation/driver-api/ptp.rst +++ b/Documentation/driver-api/ptp.rst @@ -23,6 +23,7 @@ PTP hardware clock infrastructure for Linux + Ancillary clock features - Time stamp external events - Period output signals configurable from user space + - Low Pass Filter (LPF) access from user space - Synchronization of the Linux system time via the PPS subsystem PTP hardware clock kernel API @@ -94,3 +95,14 @@ Supported hardware - Auxiliary Slave/Master Mode Snapshot (optional interrupt) - Target Time (optional interrupt) + + * Renesas (IDT) ClockMatrix™ + + - Up to 4 independent PHC channels + - Integrated low pass filter (LPF), access via .adjPhase (compliant to ITU-T G.8273.2) + - Programmable output periodic signals + - Programmable inputs can time stamp external triggers + - Driver and/or hardware configuration through firmware (idtcm.bin) + - LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.8273.2)) + - Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk to ASSPs/SoCs/FPGAs) + - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional) |