diff options
author | 2016-06-30 15:59:22 -0400 | |
---|---|---|
committer | 2016-07-28 09:34:46 +0530 | |
commit | b04f127286e6fdbd731681f9564b0a0cd36e4bbf (patch) | |
tree | d36110b64b6b1dfede9e559b4787371224539bf2 /Documentation | |
parent | mailbox: pl320: remove __raw IO (diff) | |
download | linux-b04f127286e6fdbd731681f9564b0a0cd36e4bbf.tar.gz linux-b04f127286e6fdbd731681f9564b0a0cd36e4bbf.tar.bz2 linux-b04f127286e6fdbd731681f9564b0a0cd36e4bbf.zip |
dt-bindings: add bindings documentation for PDC driver.
Add the device tree binding documentation for the PDC hardware
in Broadcom iProc SoCs.
Signed-off-by: Rob Rice <rob.rice@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt new file mode 100644 index 000000000000..411ccf421584 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/brcm,iproc-pdc-mbox.txt @@ -0,0 +1,23 @@ +The PDC driver manages data transfer to and from various offload engines +on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is +one device tree entry per block. + +Required properties: +- compatible : Should be "brcm,iproc-pdc-mbox". +- reg: Should contain PDC registers location and length. +- interrupts: Should contain the IRQ line for the PDC. +- #mbox-cells: 1 +- brcm,rx-status-len: Length of metadata preceding received frames, in bytes. + +Optional properties: +- brcm,use-bcm-hdr: present if a BCM header precedes each frame. + +Example: + pdc0: iproc-pdc0@0x612c0000 { + compatible = "brcm,iproc-pdc-mbox"; + reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */ + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; + #mbox-cells = <1>; /* one cell per mailbox channel */ + brcm,rx-status-len = <32>; + brcm,use-bcm-hdr; + }; |