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author | 2017-02-02 09:09:50 -0800 | |
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committer | 2017-02-06 09:37:57 -0800 | |
commit | 8ba605b607b7278548c1092b2ac36381627f0839 (patch) | |
tree | 1fb4e234a793d0f579402f510bae8e00ee5a15f1 /arch/arc/plat-sim | |
parent | ARCv2: intc: Delete useless comments in Device Trees (diff) | |
download | linux-8ba605b607b7278548c1092b2ac36381627f0839.tar.gz linux-8ba605b607b7278548c1092b2ac36381627f0839.tar.bz2 linux-8ba605b607b7278548c1092b2ac36381627f0839.zip |
ARC: [plat-*] ARC_HAS_COH_CACHES no longer relevant
A typical SMP system expects cache coherency. Initial NPS platform
support was slated to be SMP w/o cache coherency.
However it seems the platform now selects that option, so there is no
point in keeping it around.
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/plat-sim')
-rw-r--r-- | arch/arc/plat-sim/Kconfig | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arc/plat-sim/Kconfig b/arch/arc/plat-sim/Kconfig index 18e39fcc488a..ac6af96a82f3 100644 --- a/arch/arc/plat-sim/Kconfig +++ b/arch/arc/plat-sim/Kconfig @@ -8,7 +8,6 @@ menuconfig ARC_PLAT_SIM bool "ARC nSIM based simulation virtual platforms" - select ARC_HAS_COH_CACHES if SMP help Support for nSIM based ARC simulation platforms This includes the standalone nSIM (uart only) vs. System C OSCI VP |