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author | 2017-10-06 19:39:57 +0100 | |
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committer | 2017-10-12 11:28:29 +0100 | |
commit | ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1 (patch) | |
tree | 0f2d994489012bf0d0de415fa1895be32b808d39 /arch/arm/boot | |
parent | ARM: 8701/1: fix sparse flags for build on 64bit machines (diff) | |
download | linux-ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1.tar.gz linux-ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1.tar.bz2 linux-ee3eaee6a1dafb7ed7213ec2fad22552b4d58ed1.zip |
ARM: 8704/1: semihosting: use proper instruction on v7m processors
The svc instruction doesn't exist on v7m processors. Semihosting ops are
invoked with the bkpt instruction instead.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/compressed/debug.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/debug.S b/arch/arm/boot/compressed/debug.S index 5392ee63338f..8f6e37177de1 100644 --- a/arch/arm/boot/compressed/debug.S +++ b/arch/arm/boot/compressed/debug.S @@ -23,7 +23,11 @@ ENTRY(putc) strb r0, [r1] mov r0, #0x03 @ SYS_WRITEC ARM( svc #0x123456 ) +#ifdef CONFIG_CPU_V7M + THUMB( bkpt #0xab ) +#else THUMB( svc #0xab ) +#endif mov pc, lr .align 2 1: .word _GLOBAL_OFFSET_TABLE_ - . |