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author | 2011-10-21 17:14:27 -0500 | |
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committer | 2011-10-31 14:03:27 +0100 | |
commit | f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef (patch) | |
tree | ccf7658e1dae54e7b3eeaa8413dd86d4b865eaec /arch/arm/include/asm/hardware | |
parent | ARM: gic: add OF based initialization (diff) | |
download | linux-f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef.tar.gz linux-f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef.tar.bz2 linux-f37a53cc5d8a8fb199e41386d125d8c2ed9e54ef.zip |
ARM: gic: fix irq_alloc_descs handling for sparse irq
Commit "ARM: gic: add irq_domain support" (b49b6ff) breaks SPARSE_IRQ
on platforms with GIC. When SPARSE_IRQ is enabled, all NR_IRQS or
mach_desc->nr_irqs will be allocated by arch_probe_nr_irqs(). This caused
irq_alloc_descs to allocate irq_descs after the pre-allocated space.
Make irq_alloc_descs search for an exact irq range and assume it has
been pre-allocated on failure. For DT probing dynamic allocation is used.
DT enabled platforms should set their nr_irqs to NR_IRQ_LEGACY and have all
irq_chips allocate their irq_descs with irq_alloc_descs if SPARSE_IRQ is
enabled.
gic_init irq_start param is changed to be signed with negative meaning do
dynamic Linux irq assigment.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Diffstat (limited to 'arch/arm/include/asm/hardware')
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 0a026b9290f2..3e91f22046f5 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -39,7 +39,7 @@ struct device_node; extern void __iomem *gic_cpu_base_addr; extern struct irq_chip gic_arch_extn; -void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *); +void gic_init(unsigned int, int, void __iomem *, void __iomem *); int gic_of_init(struct device_node *node, struct device_node *parent); void gic_secondary_init(unsigned int); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); |