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author | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-12 03:15:53 -0400 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2024-05-12 03:15:53 -0400 |
commit | e5f62e27b16601f08b6b04dc964691d48d0a6a91 (patch) | |
tree | 526674e4dec329b1030bcf106842388bc90704be /arch/arm64/include/asm/esr.h | |
parent | Merge tag 'loongarch-kvm-6.10' of git://git.kernel.org/pub/scm/linux/kernel/g... (diff) | |
parent | Merge branch kvm-arm64/mpidr-reset into kvmarm-master/next (diff) | |
download | linux-e5f62e27b16601f08b6b04dc964691d48d0a6a91.tar.gz linux-e5f62e27b16601f08b6b04dc964691d48d0a6a91.tar.bz2 linux-e5f62e27b16601f08b6b04dc964691d48d0a6a91.zip |
Merge tag 'kvmarm-6.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD
KVM/arm64 updates for Linux 6.10
- Move a lot of state that was previously stored on a per vcpu
basis into a per-CPU area, because it is only pertinent to the
host while the vcpu is loaded. This results in better state
tracking, and a smaller vcpu structure.
- Add full handling of the ERET/ERETAA/ERETAB instructions in
nested virtualisation. The last two instructions also require
emulating part of the pointer authentication extension.
As a result, the trap handling of pointer authentication has
been greattly simplified.
- Turn the global (and not very scalable) LPI translation cache
into a per-ITS, scalable cache, making non directly injected
LPIs much cheaper to make visible to the vcpu.
- A batch of pKVM patches, mostly fixes and cleanups, as the
upstreaming process seems to be resuming. Fingers crossed!
- Allocate PPIs and SGIs outside of the vcpu structure, allowing
for smaller EL2 mapping and some flexibility in implementing
more or less than 32 private IRQs.
- Purge stale mpidr_data if a vcpu is created after the MPIDR
map has been created.
- Preserve vcpu-specific ID registers across a vcpu reset.
- Various minor cleanups and improvements.
Diffstat (limited to 'arch/arm64/include/asm/esr.h')
-rw-r--r-- | arch/arm64/include/asm/esr.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/esr.h b/arch/arm64/include/asm/esr.h index 81606bf7d5ac..7abf09df7033 100644 --- a/arch/arm64/include/asm/esr.h +++ b/arch/arm64/include/asm/esr.h @@ -404,6 +404,18 @@ static inline bool esr_fsc_is_access_flag_fault(unsigned long esr) return (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_ACCESS; } +/* Indicate whether ESR.EC==0x1A is for an ERETAx instruction */ +static inline bool esr_iss_is_eretax(unsigned long esr) +{ + return esr & ESR_ELx_ERET_ISS_ERET; +} + +/* Indicate which key is used for ERETAx (false: A-Key, true: B-Key) */ +static inline bool esr_iss_is_eretab(unsigned long esr) +{ + return esr & ESR_ELx_ERET_ISS_ERETA; +} + const char *esr_get_class_string(unsigned long esr); #endif /* __ASSEMBLY */ |