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| author |  Thomas Gleixner <tglx@linutronix.de>
| 2020-02-08 15:54:03 +0100 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de>
| 2020-02-08 15:54:03 +0100 |
| commit | 2f86e45a7f427d217f4b94603a9f43a14877e2cc (patch) | |
| tree | e4ee4d9fbd95e000873ae16473bcc0123c04d266 /arch/arm64/include | |
| parent | genirq: Clarify that irq wake state is orthogonal to enable/disable (diff) | |
| parent | irqchip/gic-v3-its: Rename VPENDBASER/VPROPBASER accessors (diff) | |
| download | linux-2f86e45a7f427d217f4b94603a9f43a14877e2cc.tar.gz linux-2f86e45a7f427d217f4b94603a9f43a14877e2cc.tar.bz2 linux-2f86e45a7f427d217f4b94603a9f43a14877e2cc.zip | |
Merge tag 'irqchip-fixes-5.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgent
Pull irqchip fixes for 5.6, take #1 from Marc Zyngier:
- Guarantee allocation of L2 vPE table for GICv4.1
- Fix GICv4.1 VPROPBASER programming
- Numerous GICv4.1 tidy ups
- Fix disabled GICv3 redistributor provisioning with ACPI
- KConfig cleanup for C-SKY
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/arch_gicv3.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 4750fc8030c3..25fec4bde43a 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -140,11 +140,11 @@ static inline u32 gic_read_rpr(void) #define gicr_write_pendbaser(v, c) writeq_relaxed(v, c) #define gicr_read_pendbaser(c) readq_relaxed(c) -#define gits_write_vpropbaser(v, c) writeq_relaxed(v, c) -#define gits_read_vpropbaser(c) readq_relaxed(c) +#define gicr_write_vpropbaser(v, c) writeq_relaxed(v, c) +#define gicr_read_vpropbaser(c) readq_relaxed(c) -#define gits_write_vpendbaser(v, c) writeq_relaxed(v, c) -#define gits_read_vpendbaser(c) readq_relaxed(c) +#define gicr_write_vpendbaser(v, c) writeq_relaxed(v, c) +#define gicr_read_vpendbaser(c) readq_relaxed(c) static inline bool gic_prio_masking_enabled(void) { |