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| author |  Catalin Marinas <catalin.marinas@arm.com>
| 2019-12-11 18:40:09 +0000 |
|---|---|---|
| committer |  Will Deacon <will@kernel.org>
| 2020-01-17 12:48:33 +0000 |
| commit | 95b3f74bec203804658e17f86fe20755bb8abcb9 (patch) | |
| tree | 0d8c66117f30d2c5ff4461d72664fbf3e159cf26 /arch/arm64/include | |
| parent | arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list (diff) | |
| download | linux-95b3f74bec203804658e17f86fe20755bb8abcb9.tar.gz linux-95b3f74bec203804658e17f86fe20755bb8abcb9.tar.bz2 linux-95b3f74bec203804658e17f86fe20755bb8abcb9.zip | |
arm64: Use macros instead of hard-coded constants for MAIR_EL1
Currently, the arm64 __cpu_setup has hard-coded constants for the memory
attributes that go into the MAIR_EL1 register. Define proper macros in
asm/sysreg.h and make use of them in proc.S.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/include')
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 6e919fafb43d..e21470337c5e 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -538,6 +538,18 @@ SCTLR_EL1_NTWE | SCTLR_ELx_IESB | SCTLR_EL1_SPAN |\ ENDIAN_SET_EL1 | SCTLR_EL1_UCI | SCTLR_EL1_RES1) +/* MAIR_ELx memory attributes (used by Linux) */ +#define MAIR_ATTR_DEVICE_nGnRnE UL(0x00) +#define MAIR_ATTR_DEVICE_nGnRE UL(0x04) +#define MAIR_ATTR_DEVICE_GRE UL(0x0c) +#define MAIR_ATTR_NORMAL_NC UL(0x44) +#define MAIR_ATTR_NORMAL_WT UL(0xbb) +#define MAIR_ATTR_NORMAL UL(0xff) +#define MAIR_ATTR_MASK UL(0xff) + +/* Position the attr at the correct index */ +#define MAIR_ATTRIDX(attr, idx) ((attr) << ((idx) * 8)) + /* id_aa64isar0 */ #define ID_AA64ISAR0_TS_SHIFT 52 #define ID_AA64ISAR0_FHM_SHIFT 48 |