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| author |  Mark Brown <broonie@kernel.org>
| 2022-12-27 12:55:55 +0000 |
|---|---|---|
| committer |  Catalin Marinas <catalin.marinas@arm.com>
| 2023-01-12 16:02:23 +0000 |
| commit | 8c6e105558628b63292ae770198f11a1d5535660 (patch) | |
| tree | 71054caa7599149efd9746dd1cd53dd58f117589 /arch/arm64/tools/sysreg | |
| parent | arm64/cpufeature: Fix field sign for DIT hwcap detection (diff) | |
| download | linux-8c6e105558628b63292ae770198f11a1d5535660.tar.gz linux-8c6e105558628b63292ae770198f11a1d5535660.tar.bz2 linux-8c6e105558628b63292ae770198f11a1d5535660.zip | |
arm64/sysreg: Fix errors in 32 bit enumeration values
The recently converted 32 bit ID registers have errors in MVFR0_EL1.FPSP,
MVFR0_EL1.SIMDReg and MVFR1_EL1.SIMDHP where enumeration values which
should be 0b0010 are specified as 0b0001. Correct these.
Fixes: e79c94a2a487 ("arm64/sysreg: Convert MVFR0_EL1 to automatic generation")
Fixes: c9b718eda706 ("arm64/sysreg: Convert MVFR1_EL1 to automatic generation")
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20221207-arm64-sysreg-helpers-v3-2-0d71a7b174a8@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/tools/sysreg')
| -rw-r--r-- | arch/arm64/tools/sysreg | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 184e58fd5631..e8fb6684d7f3 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -689,17 +689,17 @@ EndEnum Enum 11:8 FPDP 0b0000 NI 0b0001 VFPv2 - 0b0001 VFPv3 + 0b0010 VFPv3 EndEnum Enum 7:4 FPSP 0b0000 NI 0b0001 VFPv2 - 0b0001 VFPv3 + 0b0010 VFPv3 EndEnum Enum 3:0 SIMDReg 0b0000 NI 0b0001 IMP_16x64 - 0b0001 IMP_32x64 + 0b0010 IMP_32x64 EndEnum EndSysreg @@ -718,7 +718,7 @@ EndEnum Enum 23:20 SIMDHP 0b0000 NI 0b0001 SIMDHP - 0b0001 SIMDHP_FLOAT + 0b0010 SIMDHP_FLOAT EndEnum Enum 19:16 SIMDSP 0b0000 NI |