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author | 2014-07-07 05:05:42 -0700 | |
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committer | 2014-07-07 05:05:42 -0700 | |
commit | e9360979fea7eb1f3abdabb6a24a103c66aaa013 (patch) | |
tree | f924572bb2b61321dffa8f654820ad1571fded28 /arch/arm | |
parent | ARM: dts: Fix TI CPSW Phy mode selection on IGEP COM AQUILA. (diff) | |
parent | ARM: dts: dra7xx-clocks: Fix the l3 and l4 clock rates (diff) | |
download | linux-e9360979fea7eb1f3abdabb6a24a103c66aaa013.tar.gz linux-e9360979fea7eb1f3abdabb6a24a103c66aaa013.tar.bz2 linux-e9360979fea7eb1f3abdabb6a24a103c66aaa013.zip |
Merge branch 'for-v3.16-rc/clk-dt-fixes' of https://github.com/t-kristo/linux-pm into fixes-rc4
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/boot/dts/dra7xx-clocks.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index c90c76de84d6..dc7a292fe939 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -673,10 +673,12 @@ l3_iclk_div: l3_iclk_div { #clock-cells = <0>; - compatible = "fixed-factor-clock"; + compatible = "ti,divider-clock"; + ti,max-div = <2>; + ti,bit-shift = <4>; + reg = <0x0100>; clocks = <&dpll_core_h12x2_ck>; - clock-mult = <1>; - clock-div = <1>; + ti,index-power-of-two; }; l4_root_clk_div: l4_root_clk_div { @@ -684,7 +686,7 @@ compatible = "fixed-factor-clock"; clocks = <&l3_iclk_div>; clock-mult = <1>; - clock-div = <1>; + clock-div = <2>; }; video1_clk2_div: video1_clk2_div { |