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| author |  Alexandre Ghiti <alexghiti@rivosinc.com>
| 2023-12-12 22:34:56 +0100 |
|---|---|---|
| committer |  Dennis Zhou <dennis@kernel.org>
| 2023-12-14 00:23:17 -0800 |
| commit | 7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b (patch) | |
| tree | f02aada180e46f0f74910d88d85b96c0f181061e /arch/csky | |
| parent | Linux 6.7-rc4 (diff) | |
| download | linux-7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b.tar.gz linux-7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b.tar.bz2 linux-7a92fc8b4d20680e4c20289a670d8fca2d1f2c1b.zip | |
mm: Introduce flush_cache_vmap_early()
The pcpu setup when using the page allocator sets up a new vmalloc
mapping very early in the boot process, so early that it cannot use the
flush_cache_vmap() function which may depend on structures not yet
initialized (for example in riscv, we currently send an IPI to flush
other cpus TLB).
But on some architectures, we must call flush_cache_vmap(): for example,
in riscv, some uarchs can cache invalid TLB entries so we need to flush
the new established mapping to avoid taking an exception.
So fix this by introducing a new function flush_cache_vmap_early() which
is called right after setting the new page table entry and before
accessing this new mapping. This new function implements a local flush
tlb on riscv and is no-op for other architectures (same as today).
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Dennis Zhou <dennis@kernel.org>
Diffstat (limited to 'arch/csky')
| -rw-r--r-- | arch/csky/abiv1/inc/abi/cacheflush.h | 1 | ||||
| -rw-r--r-- | arch/csky/abiv2/inc/abi/cacheflush.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/arch/csky/abiv1/inc/abi/cacheflush.h b/arch/csky/abiv1/inc/abi/cacheflush.h index 908d8b0bc4fd..d011a81575d2 100644 --- a/arch/csky/abiv1/inc/abi/cacheflush.h +++ b/arch/csky/abiv1/inc/abi/cacheflush.h @@ -43,6 +43,7 @@ static inline void flush_anon_page(struct vm_area_struct *vma, */ extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); #define flush_cache_vmap(start, end) cache_wbinv_all() +#define flush_cache_vmap_early(start, end) do { } while (0) #define flush_cache_vunmap(start, end) cache_wbinv_all() #define flush_icache_range(start, end) cache_wbinv_range(start, end) diff --git a/arch/csky/abiv2/inc/abi/cacheflush.h b/arch/csky/abiv2/inc/abi/cacheflush.h index 40be16907267..6513ac5d2578 100644 --- a/arch/csky/abiv2/inc/abi/cacheflush.h +++ b/arch/csky/abiv2/inc/abi/cacheflush.h @@ -41,6 +41,7 @@ void flush_icache_mm_range(struct mm_struct *mm, void flush_icache_deferred(struct mm_struct *mm); #define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vmap_early(start, end) do { } while (0) #define flush_cache_vunmap(start, end) do { } while (0) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |