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author | 2022-05-31 18:04:11 +0800 | |
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committer | 2022-06-03 20:09:28 +0800 | |
commit | f2ac457a61389b7769aad8295027cbe0f91c5b80 (patch) | |
tree | 837799cf12482fc453b11f05d9152f665a1f8e08 /arch/loongarch/include/asm/regdef.h | |
parent | LoongArch: Add build infrastructure (diff) | |
download | linux-f2ac457a61389b7769aad8295027cbe0f91c5b80.tar.gz linux-f2ac457a61389b7769aad8295027cbe0f91c5b80.tar.bz2 linux-f2ac457a61389b7769aad8295027cbe0f91c5b80.zip |
LoongArch: Add CPU definition headers
Add common headers (CPU definition and address space layout) for basic
LoongArch support.
Reviewed-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Diffstat (limited to 'arch/loongarch/include/asm/regdef.h')
-rw-r--r-- | arch/loongarch/include/asm/regdef.h | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/loongarch/include/asm/regdef.h b/arch/loongarch/include/asm/regdef.h new file mode 100644 index 000000000000..49a374c2612c --- /dev/null +++ b/arch/loongarch/include/asm/regdef.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2020-2022 Loongson Technology Corporation Limited + */ +#ifndef _ASM_REGDEF_H +#define _ASM_REGDEF_H + +#define zero $r0 /* wired zero */ +#define ra $r1 /* return address */ +#define tp $r2 +#define sp $r3 /* stack pointer */ +#define a0 $r4 /* argument registers, a0/a1 reused as v0/v1 for return value */ +#define a1 $r5 +#define a2 $r6 +#define a3 $r7 +#define a4 $r8 +#define a5 $r9 +#define a6 $r10 +#define a7 $r11 +#define t0 $r12 /* caller saved */ +#define t1 $r13 +#define t2 $r14 +#define t3 $r15 +#define t4 $r16 +#define t5 $r17 +#define t6 $r18 +#define t7 $r19 +#define t8 $r20 +#define u0 $r21 +#define fp $r22 /* frame pointer */ +#define s0 $r23 /* callee saved */ +#define s1 $r24 +#define s2 $r25 +#define s3 $r26 +#define s4 $r27 +#define s5 $r28 +#define s6 $r29 +#define s7 $r30 +#define s8 $r31 + +#endif /* _ASM_REGDEF_H */ |