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| author |  Steven King <sfking@fdwdc.com>
| 2012-06-06 14:02:14 -0700 |
|---|---|---|
| committer |  Greg Ungerer <gerg@uclinux.org>
| 2012-07-16 09:59:21 +1000 |
| commit | bdee4e26ba6568118f2376ebcfdeef3b7f527bce (patch) | |
| tree | 6a0c684b48ea98c606d634aac2c9cb1707f31095 /arch/m68k/include/asm/m520xsim.h | |
| parent | coldfire-qspi: Add support for the Coldfire 5251/5253. (diff) | |
| download | linux-bdee4e26ba6568118f2376ebcfdeef3b7f527bce.tar.gz linux-bdee4e26ba6568118f2376ebcfdeef3b7f527bce.tar.bz2 linux-bdee4e26ba6568118f2376ebcfdeef3b7f527bce.zip | |
m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1
use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 so we can support
those parts that have the pit1 interrupt on other than the first interrupt
controller.
Signed-off-by: Steven King <sfking@fdwdc.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Diffstat (limited to 'arch/m68k/include/asm/m520xsim.h')
| -rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index 17f2aab9cf97..5a8b5e4da12b 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h @@ -62,6 +62,7 @@ #define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0) #define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI) +#define MCF_IRQ_PIT1 (MCFINT_VECBASE + MCFINT_PIT1) /* * SDRAM configuration registers. |