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author | 2015-11-04 11:50:11 +0100 | |
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committer | 2015-11-11 08:38:10 +0100 | |
commit | bc19f5d677c10f323650e6bb5fe45ab5fb11e9a9 (patch) | |
tree | 079b547d7e24d63c221a233abacf113da70952b9 /arch/mips | |
parent | MIPS: ralink: Fix invalid tick count (diff) | |
download | linux-bc19f5d677c10f323650e6bb5fe45ab5fb11e9a9.tar.gz linux-bc19f5d677c10f323650e6bb5fe45ab5fb11e9a9.tar.bz2 linux-bc19f5d677c10f323650e6bb5fe45ab5fb11e9a9.zip |
MIPS: ralink: Remove check for CONFIG_PCI on non-PCI SoCs
The code currently panics if PCI is enabled but the SoC has no PCI bus.
This check is superfluous as the driver only loads if enabled in the
devicetree.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11444/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r-- | arch/mips/ralink/mt7620.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c index 55ddf09d8676..dfb04fcedb04 100644 --- a/arch/mips/ralink/mt7620.c +++ b/arch/mips/ralink/mt7620.c @@ -535,9 +535,6 @@ void prom_soc_init(struct ralink_soc_info *soc_info) ralink_soc = MT762X_SOC_MT7620N; name = "MT7620N"; soc_info->compatible = "ralink,mt7620n-soc"; -#ifdef CONFIG_PCI - panic("mt7620n is only supported for non pci kernels"); -#endif } } else if (n0 == MT7620_CHIP_NAME0 && n1 == MT7628_CHIP_NAME1) { u32 efuse = __raw_readl(sysc + SYSC_REG_EFUSE_CFG); |