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| author |  Justin Swartz <justin.swartz@risingedge.co.za>
| 2024-03-16 06:54:35 +0200 |
|---|---|---|
| committer |  Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| 2024-04-15 10:23:36 +0200 |
| commit | f5a0fc0a95a0cdbce0aa81431e924a08cec01bc9 (patch) | |
| tree | c545b32b7f0e70b151c0a361a80f4912260c071f /arch/mips | |
| parent | mips: dts: ralink: mt7621: reorder i2c node attributes (diff) | |
| download | linux-f5a0fc0a95a0cdbce0aa81431e924a08cec01bc9.tar.gz linux-f5a0fc0a95a0cdbce0aa81431e924a08cec01bc9.tar.bz2 linux-f5a0fc0a95a0cdbce0aa81431e924a08cec01bc9.zip | |
mips: dts: ralink: mt7621: reorder spi0 node attributes
Reorder the attributes of the SPI controller node so that
they're aligned with the DTS style guide.
Signed-off-by: Justin Swartz <justin.swartz@risingedge.co.za>
Reviewed-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips')
| -rw-r--r-- | arch/mips/boot/dts/ralink/mt7621.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi index 87a3bcbc0ea5..60dfbae53712 100644 --- a/arch/mips/boot/dts/ralink/mt7621.dtsi +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi @@ -183,22 +183,22 @@ }; spi0: spi@b00 { - status = "disabled"; - compatible = "ralink,mt7621-spi"; reg = <0xb00 0x100>; - clocks = <&sysc MT7621_CLK_SPI>; - clock-names = "spi"; - - resets = <&sysc MT7621_RST_SPI>; - reset-names = "spi"; - #address-cells = <1>; #size-cells = <0>; + clock-names = "spi"; + clocks = <&sysc MT7621_CLK_SPI>; + pinctrl-names = "default"; pinctrl-0 = <&spi_pins>; + + reset-names = "spi"; + resets = <&sysc MT7621_RST_SPI>; + + status = "disabled"; }; }; |