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author | Chen Wang <unicorn_wang@outlook.com> | 2023-10-04 23:38:39 +0800 |
---|---|---|
committer | Conor Dooley <conor.dooley@microchip.com> | 2023-10-06 14:36:53 +0100 |
commit | d0366abc9de5ba41225a71d37036206149319223 (patch) | |
tree | 15f02c9ee2b3a56724a833a729fcec89de087fec /arch/riscv/Kconfig.socs | |
parent | riscv: dts: starfive: add assigned-clock* to limit frquency (diff) | |
download | linux-d0366abc9de5ba41225a71d37036206149319223.tar.gz linux-d0366abc9de5ba41225a71d37036206149319223.tar.bz2 linux-d0366abc9de5ba41225a71d37036206149319223.zip |
riscv: Add SOPHGO SOC family Kconfig support
The first SoC in the SOPHGO series is SG2042, which contains 64 RISC-V
cores.
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Chao Wei <chao.wei@sophgo.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/Kconfig.socs')
-rw-r--r-- | arch/riscv/Kconfig.socs | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 6833d01e2e70..d4df7b5d0f16 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -22,6 +22,11 @@ config SOC_SIFIVE help This enables support for SiFive SoC platform hardware. +config ARCH_SOPHGO + bool "Sophgo SoCs" + help + This enables support for Sophgo SoC platform hardware. + config ARCH_STARFIVE def_bool SOC_STARFIVE |