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authorGravatar Jisheng Zhang <jszhang@kernel.org> 2024-04-29 08:13:14 +0800
committerGravatar Conor Dooley <conor.dooley@microchip.com> 2024-04-30 22:04:16 +0100
commit0ffce9d49abd9492ea4959ebd3a6e9c12bf3ed70 (patch)
tree2bcd10718596ebf7fb70b1882c22eaa31eb04342 /arch/riscv/boot
parentriscv: dts: starfive: visionfive 2: use cpus label for timebase freq (diff)
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riscv: dts: starfive: visionfive 2: add tf cd-gpios
Per VisionFive 2 1.2B, and 1.3A boards' SCH, GPIO 41 is used as card detect. So add "cd-gpios" property for this. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/boot')
-rw-r--r--arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
index 910c07bd4af9..b6030d63459d 100644
--- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
+++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
@@ -303,7 +303,7 @@
bus-width = <4>;
no-sdio;
no-mmc;
- broken-cd;
+ cd-gpios = <&sysgpio 41 GPIO_ACTIVE_LOW>;
cap-sd-highspeed;
post-power-on-delay-ms = <200>;
pinctrl-names = "default";