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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-21 12:32:42 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-08-21 12:32:42 -0700 |
commit | f22c5579a7d600fa03f8c1d150cf78188f8709b6 (patch) | |
tree | 9865bd0b054c4407029bbb1d411b14091fc8d9bf /arch/riscv/include/asm/clint.h | |
parent | Merge tag 'for-linus-5.9-rc2-tag' of git://git.kernel.org/pub/scm/linux/kerne... (diff) | |
parent | riscv: Add SiFive drivers to rv32_defconfig (diff) | |
download | linux-f22c5579a7d600fa03f8c1d150cf78188f8709b6.tar.gz linux-f22c5579a7d600fa03f8c1d150cf78188f8709b6.tar.bz2 linux-f22c5579a7d600fa03f8c1d150cf78188f8709b6.zip |
Merge tag 'riscv-for-linus-5.9-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
- The CLINT driver has been split in two: one to handle the M-mode
CLINT (memory mapped and used on NOMMU systems) and one to handle the
S-mode CLINT (via SBI).
- The addition of SiFive's drivers to rv32_defconfig
* tag 'riscv-for-linus-5.9-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Add SiFive drivers to rv32_defconfig
dt-bindings: timer: Add CLINT bindings
RISC-V: Remove CLINT related code from timer and arch
clocksource/drivers: Add CLINT timer driver
RISC-V: Add mechanism to provide custom IPI operations
Diffstat (limited to 'arch/riscv/include/asm/clint.h')
-rw-r--r-- | arch/riscv/include/asm/clint.h | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/arch/riscv/include/asm/clint.h b/arch/riscv/include/asm/clint.h deleted file mode 100644 index a279b17a6aad..000000000000 --- a/arch/riscv/include/asm/clint.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _ASM_RISCV_CLINT_H -#define _ASM_RISCV_CLINT_H 1 - -#include <linux/io.h> -#include <linux/smp.h> - -#ifdef CONFIG_RISCV_M_MODE -extern u32 __iomem *clint_ipi_base; - -void clint_init_boot_cpu(void); - -static inline void clint_send_ipi_single(unsigned long hartid) -{ - writel(1, clint_ipi_base + hartid); -} - -static inline void clint_send_ipi_mask(const struct cpumask *mask) -{ - int cpu; - - for_each_cpu(cpu, mask) - clint_send_ipi_single(cpuid_to_hartid_map(cpu)); -} - -static inline void clint_clear_ipi(unsigned long hartid) -{ - writel(0, clint_ipi_base + hartid); -} -#else /* CONFIG_RISCV_M_MODE */ -#define clint_init_boot_cpu() do { } while (0) - -/* stubs to for code is only reachable under IS_ENABLED(CONFIG_RISCV_M_MODE): */ -void clint_send_ipi_single(unsigned long hartid); -void clint_send_ipi_mask(const struct cpumask *hartid_mask); -void clint_clear_ipi(unsigned long hartid); -#endif /* CONFIG_RISCV_M_MODE */ - -#endif /* _ASM_RISCV_CLINT_H */ |