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| author |  Anup Patel <apatel@ventanamicro.com>
| 2023-07-10 18:49:02 +0530 |
|---|---|---|
| committer |  Palmer Dabbelt <palmer@rivosinc.com>
| 2023-10-31 19:15:49 -0700 |
| commit | 60c46877e9cd4f7fd13fa844258f60cca4eb3e34 (patch) | |
| tree | a67ae6c764218823f9a6fc7a266edaecb4f68645 /arch/riscv/include | |
| parent | clocksource: timer-riscv: Don't enable/disable timer interrupt (diff) | |
| download | linux-60c46877e9cd4f7fd13fa844258f60cca4eb3e34.tar.gz linux-60c46877e9cd4f7fd13fa844258f60cca4eb3e34.tar.bz2 linux-60c46877e9cd4f7fd13fa844258f60cca4eb3e34.zip | |
clocksource: timer-riscv: Increase rating of clock_event_device for Sstc
When Sstc is available the RISC-V timer clock_event_device should be
the preferred clock_event_device hence we increase clock_event_device
rating for Sstc.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230710131902.1459180-3-apatel@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include')
0 files changed, 0 insertions, 0 deletions