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| author |  Samuel Holland <samuel.holland@sifive.com>
| 2024-03-26 21:49:50 -0700 |
|---|---|---|
| committer |  Palmer Dabbelt <palmer@rivosinc.com>
| 2024-04-29 10:49:32 -0700 |
| commit | 74cd17792d28162fe692d5a25fe5cc081203ad19 (patch) | |
| tree | 0658bc25719b17d844fca2068f71fe09991b3a44 /arch/riscv/include | |
| parent | riscv: Avoid TLB flush loops when affected by SiFive CIP-1200 (diff) | |
| download | linux-74cd17792d28162fe692d5a25fe5cc081203ad19.tar.gz linux-74cd17792d28162fe692d5a25fe5cc081203ad19.tar.bz2 linux-74cd17792d28162fe692d5a25fe5cc081203ad19.zip | |
riscv: mm: Introduce cntx2asid/cntx2version helper macros
When using the ASID allocator, the MM context ID contains two values:
the ASID in the lower bits, and the allocator version number in the
remaining bits. Use macros to make this separation more obvious.
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20240327045035.368512-10-samuel.holland@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/include')
| -rw-r--r-- | arch/riscv/include/asm/mmu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/mmu.h b/arch/riscv/include/asm/mmu.h index 355504b37f8e..a550fbf770be 100644 --- a/arch/riscv/include/asm/mmu.h +++ b/arch/riscv/include/asm/mmu.h @@ -26,6 +26,9 @@ typedef struct { #endif } mm_context_t; +#define cntx2asid(cntx) ((cntx) & asid_mask) +#define cntx2version(cntx) ((cntx) & ~asid_mask) + void __init create_pgd_mapping(pgd_t *pgdp, uintptr_t va, phys_addr_t pa, phys_addr_t sz, pgprot_t prot); #endif /* __ASSEMBLY__ */ |