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| author |  Charlie Jenkins <charlie@rivosinc.com>
| 2024-05-02 21:50:51 -0700 |
|---|---|---|
| committer |  Palmer Dabbelt <palmer@rivosinc.com>
| 2024-05-22 09:41:03 -0700 |
| commit | e67e98ee8952c7d5ce986d1dc6f8221ab8674afa (patch) | |
| tree | 5cd7870c9cac0785f45f3a703b62ca7fd135558d /arch/riscv/kernel | |
| parent | riscv: cpufeature: Fix thead vector hwcap removal (diff) | |
| download | linux-e67e98ee8952c7d5ce986d1dc6f8221ab8674afa.tar.gz linux-e67e98ee8952c7d5ce986d1dc6f8221ab8674afa.tar.bz2 linux-e67e98ee8952c7d5ce986d1dc6f8221ab8674afa.zip | |
riscv: cpufeature: Fix extension subset checking
This loop is supposed to check if ext->subset_ext_ids[j] is valid, rather
than if ext->subset_ext_ids[i] is valid, before setting the extension
id ext->subset_ext_ids[j] in isainfo->isa.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Fixes: 0d8295ed975b ("riscv: add ISA extension parsing for scalar crypto")
Link: https://lore.kernel.org/r/20240502-cpufeature_fixes-v4-2-b3d1a088722d@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/kernel')
| -rw-r--r-- | arch/riscv/kernel/cpufeature.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c index 13d4fc0d1817..5ef48cb20ee1 100644 --- a/arch/riscv/kernel/cpufeature.c +++ b/arch/riscv/kernel/cpufeature.c @@ -603,7 +603,7 @@ static int __init riscv_fill_hwcap_from_ext_list(unsigned long *isa2hwcap) if (ext->subset_ext_size) { for (int j = 0; j < ext->subset_ext_size; j++) { - if (riscv_isa_extension_check(ext->subset_ext_ids[i])) + if (riscv_isa_extension_check(ext->subset_ext_ids[j])) set_bit(ext->subset_ext_ids[j], isainfo->isa); } } |