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author | 2022-08-11 15:04:02 -0700 | |
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committer | 2022-08-12 07:17:38 -0700 | |
commit | 9801002f76c63327cae6e90097d3d0afb1e1b562 (patch) | |
tree | 5ed9a44c151cb710b7c7e8343cb2e59e27443f8d /arch/riscv/kvm/vcpu.c | |
parent | RISC-V: Add Sstc extension support (diff) | |
parent | RISC-V: Improve SBI definitions (diff) | |
download | linux-9801002f76c63327cae6e90097d3d0afb1e1b562.tar.gz linux-9801002f76c63327cae6e90097d3d0afb1e1b562.tar.bz2 linux-9801002f76c63327cae6e90097d3d0afb1e1b562.zip |
perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixes
A series of mostly-independent fixes and cleanups for the RISC-V PMU
drivers.
Link: https://lore.kernel.org/lkml/CAAhSdy23vE8+HxU5Jxy2rBMjy3rBTrJt_4sriuROac_sEESSVw@mail.gmail.com/T/#m9de15aef1b65ae6155fa33ea1239578ef463c2a2
* palmer/riscv-pmu:
RISC-V: Improve SBI definitions
RISC-V: Move counter info definition to sbi header file
RISC-V: Fix SBI PMU calls for RV32
RISC-V: Update user page mapping only once during start
RISC-V: Fix counter restart during overflow for RV32
Diffstat (limited to 'arch/riscv/kvm/vcpu.c')
0 files changed, 0 insertions, 0 deletions