aboutsummaryrefslogtreecommitdiff
path: root/arch/riscv/mm/pmem.c
diff options
context:
space:
mode:
authorGravatar Anup Patel <apatel@ventanamicro.com> 2022-11-14 14:35:35 +0530
committerGravatar Palmer Dabbelt <palmer@rivosinc.com> 2022-12-08 15:43:59 -0800
commita49ab905a1fc8630a94221f9a06ce0dafb266576 (patch)
tree6fcc7c4b66ac7efb898e7b9d2fdee2f3f3976e37 /arch/riscv/mm/pmem.c
parentRISC-V: Fix MEMREMAP_WB for systems with Svpbmt (diff)
downloadlinux-a49ab905a1fc8630a94221f9a06ce0dafb266576.tar.gz
linux-a49ab905a1fc8630a94221f9a06ce0dafb266576.tar.bz2
linux-a49ab905a1fc8630a94221f9a06ce0dafb266576.zip
RISC-V: Implement arch specific PMEM APIs
The NVDIMM PMEM driver expects arch specific APIs for cache maintenance and if arch does not provide these APIs then NVDIMM PMEM driver will always use MEMREMAP_WT to map persistent memory which in-turn maps as UC memory type defined by the RISC-V Svpbmt specification. Now that the Svpbmt and Zicbom support is available in RISC-V kernel, we implement PMEM APIs using ALT_CMO_OP() macros so that the NVDIMM PMEM driver can use MEMREMAP_WB to map persistent memory. Co-developed-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Signed-off-by: Anup Patel <apatel@ventanamicro.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20221114090536.1662624-3-apatel@ventanamicro.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/mm/pmem.c')
-rw-r--r--arch/riscv/mm/pmem.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/riscv/mm/pmem.c b/arch/riscv/mm/pmem.c
new file mode 100644
index 000000000000..089df92ae876
--- /dev/null
+++ b/arch/riscv/mm/pmem.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2022 Ventana Micro Systems Inc.
+ */
+
+#include <linux/export.h>
+#include <linux/libnvdimm.h>
+
+#include <asm/cacheflush.h>
+
+void arch_wb_cache_pmem(void *addr, size_t size)
+{
+ ALT_CMO_OP(clean, addr, size, riscv_cbom_block_size);
+}
+EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
+
+void arch_invalidate_pmem(void *addr, size_t size)
+{
+ ALT_CMO_OP(inval, addr, size, riscv_cbom_block_size);
+}
+EXPORT_SYMBOL_GPL(arch_invalidate_pmem);