diff options
| author |  Paul Mundt <lethal@linux-sh.org>
| 2010-11-01 12:18:48 -0400 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org>
| 2010-11-09 16:40:00 +0900 |
| commit | 16b259203c513ed28bd31cc9a981e0d3ad517943 (patch) | |
| tree | d29600ee92f96a8f9bcf9e3d91e001ea8e09015c /arch/sh/kernel/cpu/sh2a/clock-sh7203.c | |
| parent | Merge branch 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tyt... (diff) | |
| download | linux-16b259203c513ed28bd31cc9a981e0d3ad517943.tar.gz linux-16b259203c513ed28bd31cc9a981e0d3ad517943.tar.bz2 linux-16b259203c513ed28bd31cc9a981e0d3ad517943.zip | |
sh: migrate SH_CLK_MD to mode pin API.
This kills off the hardcoded SH_CLK_MD introduced by the SH-2 boards and
converts over to the mode pin API.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/kernel/cpu/sh2a/clock-sh7203.c')
| -rw-r--r-- | arch/sh/kernel/cpu/sh2a/clock-sh7203.c | 21 |
1 files changed, 9 insertions, 12 deletions
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c index 7e75d8f79502..95a008e8b735 100644 --- a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c +++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c @@ -25,21 +25,11 @@ static const int pll1rate[]={8,12,16,0}; static const int pfc_divisors[]={1,2,3,4,6,8,12}; #define ifc_divisors pfc_divisors -#if (CONFIG_SH_CLK_MD == 0) -#define PLL2 (1) -#elif (CONFIG_SH_CLK_MD == 1) -#define PLL2 (2) -#elif (CONFIG_SH_CLK_MD == 2) -#define PLL2 (4) -#elif (CONFIG_SH_CLK_MD == 3) -#define PLL2 (4) -#else -#error "Illegal Clock Mode!" -#endif +static unsigned int pll2_mult; static void master_clk_init(struct clk *clk) { - clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * PLL2 ; + clk->rate *= pll1rate[(__raw_readw(FREQCR) >> 8) & 0x0003] * pll2_mult; } static struct clk_ops sh7203_master_clk_ops = { @@ -79,6 +69,13 @@ static struct clk_ops *sh7203_clk_ops[] = { void __init arch_init_clk_ops(struct clk_ops **ops, int idx) { + if (test_mode_pin(MODE_PIN1)) + pll2_mult = 4; + else if (test_mode_pin(MODE_PIN0)) + pll2_mult = 2; + else + pll2_mult = 1; + if (idx < ARRAY_SIZE(sh7203_clk_ops)) *ops = sh7203_clk_ops[idx]; } |