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| author |  Thomas Gleixner <tglx@linutronix.de>
| 2023-08-14 10:18:38 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de>
| 2023-10-10 14:38:18 +0200 |
| commit | 6e29032340b60f7aa7475c8234b17273e4424007 (patch) | |
| tree | 6b457ed2a5ff763fe901c255a474f17f35e6ebc6 /arch/x86/include/asm/processor.h | |
| parent | x86/cpu: Move logical package and die IDs into topology info (diff) | |
| download | linux-6e29032340b60f7aa7475c8234b17273e4424007.tar.gz linux-6e29032340b60f7aa7475c8234b17273e4424007.tar.bz2 linux-6e29032340b60f7aa7475c8234b17273e4424007.zip | |
x86/cpu: Move cpu_l[l2]c_id into topology info
The topology IDs which identify the LLC and L2 domains clearly belong to
the per CPU topology information.
Move them into cpuinfo_x86::cpuinfo_topo and get rid of the extra per CPU
data and the related exports.
This also paves the way to do proper topology evaluation during early boot
because it removes the only per CPU dependency for that.
No functional change.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085112.803864641@linutronix.de
Diffstat (limited to 'arch/x86/include/asm/processor.h')
| -rw-r--r-- | arch/x86/include/asm/processor.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index b2cf309eed99..d529d8a9ab5e 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -99,6 +99,10 @@ struct cpuinfo_topology { // Logical ID mappings u32 logical_pkg_id; u32 logical_die_id; + + // Cache level topology IDs + u32 llc_id; + u32 l2c_id; }; struct cpuinfo_x86 { @@ -689,7 +693,15 @@ extern int set_tsc_mode(unsigned int val); DECLARE_PER_CPU(u64, msr_misc_features_shadow); -extern u16 get_llc_id(unsigned int cpu); +static inline u16 per_cpu_llc_id(unsigned int cpu) +{ + return per_cpu(cpu_info.topo.llc_id, cpu); +} + +static inline u16 per_cpu_l2c_id(unsigned int cpu) +{ + return per_cpu(cpu_info.topo.l2c_id, cpu); +} #ifdef CONFIG_CPU_SUP_AMD extern u32 amd_get_nodes_per_socket(void); |