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| author |  Babu Moger <babu.moger@amd.com>
| 2020-09-11 14:28:35 -0500 |
|---|---|---|
| committer |  Paolo Bonzini <pbonzini@redhat.com>
| 2020-09-28 07:57:15 -0400 |
| commit | 4c44e8d6c19330e48a87103184f840ffe5a423cd (patch) | |
| tree | ae9478ae71ff4e056d83ef6058202ce1db497372 /arch/x86/include/asm/svm.h | |
| parent | KVM: SVM: Modify 64 bit intercept field to two 32 bit vectors (diff) | |
| download | linux-4c44e8d6c19330e48a87103184f840ffe5a423cd.tar.gz linux-4c44e8d6c19330e48a87103184f840ffe5a423cd.tar.bz2 linux-4c44e8d6c19330e48a87103184f840ffe5a423cd.zip | |
KVM: SVM: Add new intercept word in vmcb_control_area
The new intercept bits have been added in vmcb control area to support
few more interceptions. Here are the some of them.
- INTERCEPT_INVLPGB,
- INTERCEPT_INVLPGB_ILLEGAL,
- INTERCEPT_INVPCID,
- INTERCEPT_MCOMMIT,
- INTERCEPT_TLBSYNC,
Add a new intercept word in vmcb_control_area to support these instructions.
Also update kvm_nested_vmrun trace function to support the new addition.
AMD documentation for these instructions is available at "AMD64
Architecture Programmer’s Manual Volume 2: System Programming, Pub. 24593
Rev. 3.34(or later)"
The documentation can be obtained at the links below:
Link: https://www.amd.com/system/files/TechDocs/24593.pdf
Link: https://bugzilla.kernel.org/show_bug.cgi?id=206537
Signed-off-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Message-Id: <159985251547.11252.16994139329949066945.stgit@bmoger-ubuntu>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/x86/include/asm/svm.h')
| -rw-r--r-- | arch/x86/include/asm/svm.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index c2ae1dfb37a4..71d630bb5e08 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -16,6 +16,7 @@ enum intercept_words { INTERCEPT_EXCEPTION, INTERCEPT_WORD3, INTERCEPT_WORD4, + INTERCEPT_WORD5, MAX_INTERCEPT, }; @@ -97,6 +98,12 @@ enum { INTERCEPT_MWAIT_COND, INTERCEPT_XSETBV, INTERCEPT_RDPRU, + /* Byte offset 014h (word 5) */ + INTERCEPT_INVLPGB = 160, + INTERCEPT_INVLPGB_ILLEGAL, + INTERCEPT_INVPCID, + INTERCEPT_MCOMMIT, + INTERCEPT_TLBSYNC, }; |